Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Siva Durga Prasad Paladugu | 95dbaaf | 2018-01-05 16:16:15 +0530 | [diff] [blame] | 2 | /* |
| 3 | * dts file for Xilinx ZynqMP Mini Configuration |
| 4 | * |
| 5 | * (C) Copyright 2018, Xilinx, Inc. |
| 6 | * |
Michal Simek | a8c9436 | 2023-07-10 14:35:49 +0200 | [diff] [blame] | 7 | * Siva Durga Prasad <siva.durga.prasad.paladugu@amd.com>> |
| 8 | * Michal Simek <michal.simek@amd.com> |
Siva Durga Prasad Paladugu | 95dbaaf | 2018-01-05 16:16:15 +0530 | [diff] [blame] | 9 | */ |
| 10 | |
| 11 | /dts-v1/; |
| 12 | |
| 13 | / { |
| 14 | model = "ZynqMP MINI NAND"; |
| 15 | compatible = "xlnx,zynqmp"; |
| 16 | #address-cells = <2>; |
| 17 | #size-cells = <1>; |
| 18 | |
| 19 | aliases { |
| 20 | serial0 = &dcc; |
| 21 | }; |
| 22 | |
| 23 | chosen { |
| 24 | stdout-path = "serial0:115200n8"; |
| 25 | }; |
| 26 | |
| 27 | memory@0 { |
| 28 | device_type = "memory"; |
| 29 | reg = <0x0 0x0 0x40000000>; |
| 30 | }; |
| 31 | |
| 32 | dcc: dcc { |
| 33 | compatible = "arm,dcc"; |
| 34 | status = "disabled"; |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 35 | bootph-all; |
Siva Durga Prasad Paladugu | 95dbaaf | 2018-01-05 16:16:15 +0530 | [diff] [blame] | 36 | }; |
| 37 | |
| 38 | amba: amba { |
| 39 | compatible = "simple-bus"; |
| 40 | #address-cells = <2>; |
| 41 | #size-cells = <1>; |
| 42 | ranges; |
| 43 | |
| 44 | nand0: nand@ff100000 { |
| 45 | compatible = "arasan,nfc-v3p10"; |
| 46 | status = "okay"; |
| 47 | reg = <0x0 0xff100000 0x1000>; |
| 48 | clock-names = "clk_sys", "clk_flash"; |
| 49 | #address-cells = <2>; |
| 50 | #size-cells = <1>; |
| 51 | arasan,has-mdma; |
| 52 | num-cs = <2>; |
Siva Durga Prasad Paladugu | 95dbaaf | 2018-01-05 16:16:15 +0530 | [diff] [blame] | 53 | }; |
| 54 | }; |
| 55 | }; |
| 56 | |
| 57 | &dcc { |
| 58 | status = "okay"; |
| 59 | }; |