| Michal Simek | a335bd2 | 2016-04-07 16:00:11 +0200 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm019_dc5" | ||||
| 3 | CONFIG_ARCH_ZYNQMP=y | ||||
| Michal Simek | 19abc1d | 2017-02-10 13:57:35 +0100 | [diff] [blame] | 4 | CONFIG_SYS_TEXT_BASE=0x8000000 |
| Michal Simek | cbd9118 | 2016-06-03 11:35:17 +0200 | [diff] [blame] | 5 | CONFIG_SYS_MALLOC_F_LEN=0x8000 |
| Michal Simek | 040050b | 2018-03-23 09:34:00 +0100 | [diff] [blame] | 6 | CONFIG_SPL=y |
| Siva Durga Prasad Paladugu | 809438d | 2016-07-29 15:31:47 +0530 | [diff] [blame] | 7 | CONFIG_IDENT_STRING=" Xilinx ZynqMP ZC1751 xm019 dc5" |
| Michal Simek | a335bd2 | 2016-04-07 16:00:11 +0200 | [diff] [blame] | 8 | CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm019-dc5" |
| Michal Simek | be2b844 | 2017-10-31 14:23:27 +0100 | [diff] [blame] | 9 | CONFIG_DEBUG_UART=y |
| Tom Rini | 8db91cf | 2016-11-29 09:14:57 -0500 | [diff] [blame] | 10 | CONFIG_DISTRO_DEFAULTS=y |
| Michal Simek | a335bd2 | 2016-04-07 16:00:11 +0200 | [diff] [blame] | 11 | CONFIG_FIT=y |
| 12 | CONFIG_FIT_VERBOSE=y | ||||
| Michal Simek | 437c59c | 2016-05-17 08:38:53 +0200 | [diff] [blame] | 13 | CONFIG_SPL_LOAD_FIT=y |
| Lokesh Vutla | fbad370 | 2016-10-08 14:41:44 -0400 | [diff] [blame] | 14 | # CONFIG_DISPLAY_CPUINFO is not set |
| Lokesh Vutla | 94d95e4 | 2016-10-11 21:33:46 -0400 | [diff] [blame] | 15 | # CONFIG_DISPLAY_BOARDINFO is not set |
| Mario Six | 75b23ed | 2018-03-28 14:38:15 +0200 | [diff] [blame] | 16 | CONFIG_BOARD_EARLY_INIT_R=y |
| Heiko Schocher | 1d12ba2 | 2016-10-06 07:55:15 +0200 | [diff] [blame] | 17 | CONFIG_SPL_OS_BOOT=y |
| Michal Simek | 406d1c6 | 2017-12-08 15:01:19 +0100 | [diff] [blame] | 18 | CONFIG_SPL_RAM_SUPPORT=y |
| 19 | CONFIG_SPL_RAM_DEVICE=y | ||||
| Luca Ceresoli | 560f419 | 2018-03-12 17:18:38 +0100 | [diff] [blame] | 20 | CONFIG_SPL_ATF=y |
| Michal Simek | a335bd2 | 2016-04-07 16:00:11 +0200 | [diff] [blame] | 21 | CONFIG_SYS_PROMPT="ZynqMP> " |
| Michal Simek | a335bd2 | 2016-04-07 16:00:11 +0200 | [diff] [blame] | 22 | CONFIG_CMD_MEMTEST=y |
| Mario Six | 0051899 | 2018-03-28 14:38:14 +0200 | [diff] [blame] | 23 | CONFIG_SYS_ALT_MEMTEST=y |
| Michal Simek | 41f70e2 | 2017-12-01 15:35:43 +0100 | [diff] [blame] | 24 | CONFIG_CMD_CLK=y |
| Michal Simek | a335bd2 | 2016-04-07 16:00:11 +0200 | [diff] [blame] | 25 | # CONFIG_CMD_FLASH is not set |
| Michal Simek | 8bfe60b | 2017-12-08 15:03:26 +0100 | [diff] [blame] | 26 | CONFIG_CMD_FPGA_LOADBP=y |
| 27 | CONFIG_CMD_FPGA_LOADP=y | ||||
| Michal Simek | 319cff4 | 2016-04-13 08:49:03 +0200 | [diff] [blame] | 28 | CONFIG_CMD_I2C=y |
| Tom Rini | 78873cd | 2017-08-14 19:58:53 -0400 | [diff] [blame] | 29 | CONFIG_CMD_MMC=y |
| Michal Simek | a335bd2 | 2016-04-07 16:00:11 +0200 | [diff] [blame] | 30 | CONFIG_CMD_TFTPPUT=y |
| Michal Simek | a335bd2 | 2016-04-07 16:00:11 +0200 | [diff] [blame] | 31 | CONFIG_CMD_TIME=y |
| 32 | CONFIG_CMD_TIMER=y | ||||
| Tom Rini | 1d9ac83 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 33 | CONFIG_CMD_EXT4_WRITE=y |
| Michal Simek | 4c1f7f8 | 2016-07-15 08:41:46 +0200 | [diff] [blame] | 34 | CONFIG_SPL_OF_CONTROL=y |
| Michal Simek | a335bd2 | 2016-04-07 16:00:11 +0200 | [diff] [blame] | 35 | CONFIG_OF_EMBED=y |
| Tom Rini | 5b0b040 | 2017-08-28 07:16:32 -0400 | [diff] [blame] | 36 | CONFIG_ENV_IS_IN_FAT=y |
| Michal Simek | 2419197 | 2018-03-28 14:30:35 +0200 | [diff] [blame] | 37 | CONFIG_NET_RANDOM_ETHADDR=y |
| Michal Simek | b9c5d13 | 2016-07-27 15:08:03 +0200 | [diff] [blame] | 38 | CONFIG_SPL_DM=y |
| Michal Simek | 4c1f7f8 | 2016-07-15 08:41:46 +0200 | [diff] [blame] | 39 | CONFIG_SPL_DM_SEQ_ALIAS=y |
| Michal Simek | a6604b6 | 2017-12-08 14:50:42 +0100 | [diff] [blame] | 40 | CONFIG_CLK_ZYNQMP=y |
| Siva Durga Prasad Paladugu | 460fdce | 2016-01-13 16:25:37 +0530 | [diff] [blame] | 41 | CONFIG_FPGA_XILINX=y |
| 42 | CONFIG_FPGA_ZYNQMPPL=y | ||||
| Tom Rini | afea41d | 2016-09-08 16:11:59 -0400 | [diff] [blame] | 43 | CONFIG_DM_GPIO=y |
| Michal Simek | b9c5d13 | 2016-07-27 15:08:03 +0200 | [diff] [blame] | 44 | CONFIG_DM_I2C=y |
| Michal Simek | 319cff4 | 2016-04-13 08:49:03 +0200 | [diff] [blame] | 45 | CONFIG_SYS_I2C_CADENCE=y |
| Michal Simek | 4640871 | 2017-12-08 14:46:30 +0100 | [diff] [blame] | 46 | CONFIG_MISC=y |
| Michal Simek | a335bd2 | 2016-04-07 16:00:11 +0200 | [diff] [blame] | 47 | CONFIG_DM_MMC=y |
| Masahiro Yamada | 7db8c17 | 2016-12-07 22:10:28 +0900 | [diff] [blame] | 48 | CONFIG_MMC_SDHCI=y |
| Michal Simek | 19abc1d | 2017-02-10 13:57:35 +0100 | [diff] [blame] | 49 | CONFIG_MMC_SDHCI_ZYNQ=y |
| Michal Simek | ad16a45 | 2018-03-28 14:17:19 +0200 | [diff] [blame] | 50 | CONFIG_PHY_MARVELL=y |
| 51 | CONFIG_PHY_NATSEMI=y | ||||
| 52 | CONFIG_PHY_REALTEK=y | ||||
| 53 | CONFIG_PHY_TI=y | ||||
| 54 | CONFIG_PHY_VITESSE=y | ||||
| 55 | CONFIG_PHY_FIXED=y | ||||
| Michal Simek | a335bd2 | 2016-04-07 16:00:11 +0200 | [diff] [blame] | 56 | CONFIG_DM_ETH=y |
| Michal Simek | eeb7a34 | 2018-01-31 09:18:33 +0100 | [diff] [blame] | 57 | CONFIG_PHY_GIGE=y |
| 58 | CONFIG_ZYNQ_GEM=y | ||||
| Michal Simek | be2b844 | 2017-10-31 14:23:27 +0100 | [diff] [blame] | 59 | CONFIG_DEBUG_UART_ZYNQ=y |
| 60 | CONFIG_DEBUG_UART_BASE=0xff000000 | ||||
| 61 | CONFIG_DEBUG_UART_CLOCK=100000000 | ||||
| 62 | CONFIG_DEBUG_UART_ANNOUNCE=y | ||||
| Michal Simek | ab75453 | 2017-11-06 09:16:05 +0100 | [diff] [blame] | 63 | CONFIG_ZYNQ_SERIAL=y |
| Alexander Graf | 8d2f565 | 2016-05-11 18:25:49 +0200 | [diff] [blame] | 64 | CONFIG_EFI_LOADER_BOUNCE_BUFFER=y |