Manivannan Sadhasivam | cf33f92 | 2019-08-02 20:40:09 +0530 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * (C) Copyright 2019 Linaro |
| 4 | * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> |
| 5 | */ |
| 6 | |
| 7 | #ifndef __HIKEY_H |
| 8 | #define __HIKEY_H |
| 9 | |
| 10 | #include <linux/sizes.h> |
| 11 | |
Manivannan Sadhasivam | cf33f92 | 2019-08-02 20:40:09 +0530 | [diff] [blame] | 12 | /* Physical Memory Map */ |
| 13 | |
Simon Glass | 72cc538 | 2022-10-20 18:22:39 -0600 | [diff] [blame] | 14 | /* CONFIG_TEXT_BASE needs to align with where ATF loads bl33.bin */ |
Manivannan Sadhasivam | cf33f92 | 2019-08-02 20:40:09 +0530 | [diff] [blame] | 15 | |
| 16 | #define PHYS_SDRAM_1 0x00000000 |
| 17 | #define PHYS_SDRAM_1_SIZE 0xC0000000 |
| 18 | |
| 19 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
| 20 | |
| 21 | #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 |
| 22 | |
Manivannan Sadhasivam | cf33f92 | 2019-08-02 20:40:09 +0530 | [diff] [blame] | 23 | /* Generic Interrupt Controller Definitions */ |
| 24 | #define GICD_BASE 0xe82b1000 |
| 25 | #define GICC_BASE 0xe82b2000 |
| 26 | |
Manivannan Sadhasivam | cf33f92 | 2019-08-02 20:40:09 +0530 | [diff] [blame] | 27 | #define BOOT_TARGET_DEVICES(func) \ |
| 28 | func(MMC, mmc, 0) |
| 29 | #include <config_distro_bootcmd.h> |
| 30 | |
| 31 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 32 | "image=Image\0" \ |
| 33 | "fdtfile=hi3660-hikey960.dtb\0" \ |
| 34 | "fdt_addr_r=0x10000000\0" \ |
| 35 | "kernel_addr_r=0x11000000\0" \ |
| 36 | "scriptaddr=0x00020000\0" \ |
| 37 | "fdt_high=0xffffffffffffffff\0" \ |
| 38 | "initrd_high=0xffffffffffffffff\0" \ |
| 39 | BOOTENV |
| 40 | |
Manivannan Sadhasivam | cf33f92 | 2019-08-02 20:40:09 +0530 | [diff] [blame] | 41 | /* TODO: Remove this once the SD clock is fixed */ |
Manivannan Sadhasivam | cf33f92 | 2019-08-02 20:40:09 +0530 | [diff] [blame] | 42 | |
| 43 | #endif /* __HIKEY_H */ |