| huang lin | 2de748f | 2015-11-17 14:20:28 +0800 | [diff] [blame] | 1 | CONFIG_ARM=y |
| Tom Rini | e1e8544 | 2021-08-27 21:18:30 -0400 | [diff] [blame] | 2 | CONFIG_SKIP_LOWLEVEL_INIT=y |
| 3 | CONFIG_SPL_SKIP_LOWLEVEL_INIT=y | ||||
| Tom Rini | d391d8b | 2021-12-11 14:55:51 -0500 | [diff] [blame] | 4 | CONFIG_SYS_ARCH_TIMER=y |
| Andy Yan | 26beb52 | 2017-07-24 17:51:07 +0800 | [diff] [blame] | 5 | # CONFIG_SPL_USE_ARCH_MEMCPY is not set |
| 6 | # CONFIG_SPL_USE_ARCH_MEMSET is not set | ||||
| huang lin | 2de748f | 2015-11-17 14:20:28 +0800 | [diff] [blame] | 7 | CONFIG_ARCH_ROCKCHIP=y |
| Simon Glass | 72cc538 | 2022-10-20 18:22:39 -0600 | [diff] [blame] | 8 | CONFIG_TEXT_BASE=0x60000000 |
| Andy Yan | e92c532 | 2017-07-24 17:51:30 +0800 | [diff] [blame] | 9 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
| Tom Rini | 2e262c4 | 2020-08-10 15:31:07 -0400 | [diff] [blame] | 10 | CONFIG_NR_DRAM_BANKS=1 |
| Tom Rini | a20e51f | 2021-06-28 10:17:29 -0400 | [diff] [blame] | 11 | CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk" |
| Tom Rini | 0332a1a | 2020-07-06 13:54:25 -0400 | [diff] [blame] | 12 | CONFIG_SPL_TEXT_BASE=0x10081000 |
| huang lin | 2de748f | 2015-11-17 14:20:28 +0800 | [diff] [blame] | 13 | CONFIG_ROCKCHIP_RK3036=y |
| Tom Rini | fdc7e36 | 2019-11-11 20:04:24 -0500 | [diff] [blame] | 14 | CONFIG_SPL_STACK_R_ADDR=0x80000 |
| Tom Rini | e0056d7 | 2018-06-04 11:57:37 -0400 | [diff] [blame] | 15 | CONFIG_SPL_SYS_MALLOC_F_LEN=0x0 |
| 16 | CONFIG_DEBUG_UART_BASE=0x20068000 | ||||
| 17 | CONFIG_DEBUG_UART_CLOCK=24000000 | ||||
| Tom Rini | 0997ee0 | 2021-08-23 10:25:31 -0400 | [diff] [blame] | 18 | CONFIG_SYS_LOAD_ADDR=0x60800800 |
| Tom Rini | 4b2fcb3 | 2022-04-08 13:36:51 -0400 | [diff] [blame] | 19 | CONFIG_DEBUG_UART=y |
| Tom Rini | 4ddbade | 2022-05-25 12:16:03 -0400 | [diff] [blame] | 20 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y |
| 21 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60100000 | ||||
| Tom Rini | b5bf562 | 2017-08-25 17:50:27 -0400 | [diff] [blame] | 22 | # CONFIG_ANDROID_BOOT_IMAGE is not set |
| Simon Glass | 4be229d | 2019-07-20 20:51:14 -0600 | [diff] [blame] | 23 | CONFIG_USE_PREBOOT=y |
| Klaus Goger | 2b6b4f2 | 2018-05-25 23:45:05 +0200 | [diff] [blame] | 24 | CONFIG_DEFAULT_FDT_FILE="rk3036-evb.dtb" |
| Lokesh Vutla | fbad370 | 2016-10-08 14:41:44 -0400 | [diff] [blame] | 25 | # CONFIG_DISPLAY_CPUINFO is not set |
| Mario Six | f705544 | 2018-03-28 14:38:17 +0200 | [diff] [blame] | 26 | CONFIG_DISPLAY_BOARDINFO_LATE=y |
| Tom Rini | 623d67e | 2018-02-06 12:15:38 -0500 | [diff] [blame] | 27 | # CONFIG_SPL_FRAMEWORK is not set |
| Tom Rini | abb0f52 | 2022-05-16 17:20:26 -0400 | [diff] [blame] | 28 | CONFIG_SPL_PAD_TO=0x7f8000 |
| Tom Rini | 0cb89e7 | 2022-05-19 15:09:22 -0400 | [diff] [blame] | 29 | CONFIG_SPL_NO_BSS_LIMIT=y |
| huang lin | 2de748f | 2015-11-17 14:20:28 +0800 | [diff] [blame] | 30 | CONFIG_SPL_STACK_R=y |
| Patrick Delaunay | 7328709 | 2017-01-27 11:00:42 +0100 | [diff] [blame] | 31 | CONFIG_CMD_GPT=y |
| Tom Rini | 78873cd | 2017-08-14 19:58:53 -0400 | [diff] [blame] | 32 | CONFIG_CMD_I2C=y |
| Tom Rini | 1d9ac83 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 33 | CONFIG_CMD_MMC=y |
| Tom Rini | 0f2dcb9 | 2016-04-22 16:41:25 -0400 | [diff] [blame] | 34 | CONFIG_CMD_SPI=y |
| Urja Rannikko | 17dd9d3 | 2019-05-13 13:51:04 +0000 | [diff] [blame] | 35 | CONFIG_CMD_USB_MASS_STORAGE=y |
| huang lin | 2de748f | 2015-11-17 14:20:28 +0800 | [diff] [blame] | 36 | # CONFIG_CMD_SETEXPR is not set |
| Tom Rini | 1d9ac83 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 37 | CONFIG_CMD_CACHE=y |
| Tom Rini | 0f2dcb9 | 2016-04-22 16:41:25 -0400 | [diff] [blame] | 38 | CONFIG_CMD_TIME=y |
| Patrick Delaunay | f7e0772 | 2017-01-27 11:00:37 +0100 | [diff] [blame] | 39 | # CONFIG_SPL_DOS_PARTITION is not set |
| Patrick Delaunay | 8a4f2bd | 2017-01-27 11:00:41 +0100 | [diff] [blame] | 40 | # CONFIG_SPL_EFI_PARTITION is not set |
| Tom Rini | ca63e71 | 2019-11-12 22:46:36 -0500 | [diff] [blame] | 41 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
| huang lin | 2de748f | 2015-11-17 14:20:28 +0800 | [diff] [blame] | 42 | CONFIG_REGMAP=y |
| 43 | CONFIG_SYSCON=y | ||||
| Tom Rini | 1794ae6 | 2018-12-05 08:23:38 -0500 | [diff] [blame] | 44 | # CONFIG_SPL_BLK is not set |
| Simon Glass | c08ebf6 | 2016-02-22 22:55:40 -0700 | [diff] [blame] | 45 | CONFIG_CLK=y |
| Alex Kiernan | e80d294 | 2018-05-29 15:30:55 +0000 | [diff] [blame] | 46 | CONFIG_FASTBOOT_CMD_OEM_FORMAT=y |
| Simon Glass | c08ebf6 | 2016-02-22 22:55:40 -0700 | [diff] [blame] | 47 | CONFIG_ROCKCHIP_GPIO=y |
| huang lin | 2de748f | 2015-11-17 14:20:28 +0800 | [diff] [blame] | 48 | CONFIG_SYS_I2C_ROCKCHIP=y |
| Simon Glass | c08ebf6 | 2016-02-22 22:55:40 -0700 | [diff] [blame] | 49 | CONFIG_LED=y |
| Masahiro Yamada | 7942e91 | 2017-01-10 13:32:04 +0900 | [diff] [blame] | 50 | CONFIG_MMC_DW=y |
| Masahiro Yamada | dc607f8 | 2017-01-10 13:32:03 +0900 | [diff] [blame] | 51 | CONFIG_MMC_DW_ROCKCHIP=y |
| Miquel Raynal | 2e35dbb | 2019-10-03 19:50:05 +0200 | [diff] [blame] | 52 | CONFIG_MTD=y |
| Patrick Delaunay | 0df8104 | 2019-02-27 15:20:36 +0100 | [diff] [blame] | 53 | CONFIG_SF_DEFAULT_SPEED=20000000 |
| Urja Rannikko | 7a19eec | 2019-05-13 13:51:03 +0000 | [diff] [blame] | 54 | CONFIG_SPI_FLASH_GIGADEVICE=y |
| Simon Glass | c08ebf6 | 2016-02-22 22:55:40 -0700 | [diff] [blame] | 55 | CONFIG_PINCTRL=y |
| Andy Yan | e92c532 | 2017-07-24 17:51:30 +0800 | [diff] [blame] | 56 | # CONFIG_SPL_DM_SERIAL is not set |
| Simon Glass | e0f177b | 2015-12-13 21:37:00 -0700 | [diff] [blame] | 57 | CONFIG_DEBUG_UART_SHIFT=2 |
| Tom Rini | afea41d | 2016-09-08 16:11:59 -0400 | [diff] [blame] | 58 | CONFIG_SYSRESET=y |
| Tom Rini | 2c7a8d4 | 2019-08-14 08:11:27 -0400 | [diff] [blame] | 59 | # CONFIG_SPL_SYSRESET is not set |
| Tom Rini | 504997e | 2017-08-25 17:50:26 -0400 | [diff] [blame] | 60 | CONFIG_USB=y |
| 61 | CONFIG_USB_GADGET=y | ||||
| 62 | CONFIG_USB_GADGET_DWC2_OTG=y | ||||
| Andy Yan | e92c532 | 2017-07-24 17:51:30 +0800 | [diff] [blame] | 63 | CONFIG_SPL_TINY_MEMSET=y |
| Simon Glass | c08ebf6 | 2016-02-22 22:55:40 -0700 | [diff] [blame] | 64 | CONFIG_CMD_DHRYSTONE=y |
| 65 | CONFIG_ERRNO_STR=y | ||||