Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 2 | /* |
| 3 | * Ethernet driver for TI TMS320DM644x (DaVinci) chips. |
| 4 | * |
| 5 | * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> |
| 6 | * |
| 7 | * Parts shamelessly stolen from TI's dm644x_emac.c. Original copyright |
| 8 | * follows: |
| 9 | * |
| 10 | * ---------------------------------------------------------------------------- |
| 11 | * |
| 12 | * dm644x_emac.c |
| 13 | * |
| 14 | * TI DaVinci (DM644X) EMAC peripheral driver source for DV-EVM |
| 15 | * |
| 16 | * Copyright (C) 2005 Texas Instruments. |
| 17 | * |
| 18 | * ---------------------------------------------------------------------------- |
| 19 | * |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 20 | * Modifications: |
| 21 | * ver. 1.0: Sep 2005, Anant Gole - Created EMAC version for uBoot. |
| 22 | * ver 1.1: Nov 2005, Anant Gole - Extended the RX logic for multiple descriptors |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 23 | */ |
| 24 | #include <common.h> |
| 25 | #include <command.h> |
Simon Glass | 6333448 | 2019-11-14 12:57:39 -0700 | [diff] [blame] | 26 | #include <cpu_func.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 27 | #include <log.h> |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 28 | #include <net.h> |
| 29 | #include <miiphy.h> |
Ben Warren | 5301bbf | 2009-05-26 00:34:07 -0700 | [diff] [blame] | 30 | #include <malloc.h> |
Simon Glass | 274e0b0 | 2020-05-10 11:39:56 -0600 | [diff] [blame] | 31 | #include <asm/cache.h> |
Ilya Yanok | ff67276 | 2011-11-28 06:37:33 +0000 | [diff] [blame] | 32 | #include <linux/compiler.h> |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 33 | #include <asm/arch/emac_defs.h> |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 34 | #include <asm/io.h> |
Simon Glass | dbd7954 | 2020-05-10 11:40:11 -0600 | [diff] [blame] | 35 | #include <linux/delay.h> |
Ilya Yanok | 5f732f7 | 2011-11-28 06:37:29 +0000 | [diff] [blame] | 36 | #include "davinci_emac.h" |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 37 | |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 38 | unsigned int emac_dbg = 0; |
| 39 | #define debug_emac(fmt,args...) if (emac_dbg) printf(fmt,##args) |
| 40 | |
Ilya Yanok | 518036e | 2011-11-28 06:37:30 +0000 | [diff] [blame] | 41 | #ifdef EMAC_HW_RAM_ADDR |
| 42 | static inline unsigned long BD_TO_HW(unsigned long x) |
| 43 | { |
| 44 | if (x == 0) |
| 45 | return 0; |
| 46 | |
| 47 | return x - EMAC_WRAPPER_RAM_ADDR + EMAC_HW_RAM_ADDR; |
| 48 | } |
| 49 | |
| 50 | static inline unsigned long HW_TO_BD(unsigned long x) |
| 51 | { |
| 52 | if (x == 0) |
| 53 | return 0; |
| 54 | |
| 55 | return x - EMAC_HW_RAM_ADDR + EMAC_WRAPPER_RAM_ADDR; |
| 56 | } |
| 57 | #else |
| 58 | #define BD_TO_HW(x) (x) |
| 59 | #define HW_TO_BD(x) (x) |
| 60 | #endif |
| 61 | |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 62 | #ifdef DAVINCI_EMAC_GIG_ENABLE |
Manjunath Hadli | 5b5260e | 2011-10-13 03:40:55 +0000 | [diff] [blame] | 63 | #define emac_gigabit_enable(phy_addr) davinci_eth_gigabit_enable(phy_addr) |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 64 | #else |
Manjunath Hadli | 5b5260e | 2011-10-13 03:40:55 +0000 | [diff] [blame] | 65 | #define emac_gigabit_enable(phy_addr) /* no gigabit to enable */ |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 66 | #endif |
| 67 | |
Heiko Schocher | 3e80613 | 2011-11-01 20:00:27 +0000 | [diff] [blame] | 68 | #if !defined(CONFIG_SYS_EMAC_TI_CLKDIV) |
| 69 | #define CONFIG_SYS_EMAC_TI_CLKDIV ((EMAC_MDIO_BUS_FREQ / \ |
| 70 | EMAC_MDIO_CLOCK_FREQ) - 1) |
| 71 | #endif |
| 72 | |
Sandeep Paulraj | 4b26f05 | 2008-08-31 00:39:46 +0200 | [diff] [blame] | 73 | static void davinci_eth_mdio_enable(void); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 74 | |
| 75 | static int gen_init_phy(int phy_addr); |
| 76 | static int gen_is_phy_connected(int phy_addr); |
| 77 | static int gen_get_link_speed(int phy_addr); |
| 78 | static int gen_auto_negotiate(int phy_addr); |
| 79 | |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 80 | void eth_mdio_enable(void) |
| 81 | { |
Sandeep Paulraj | 4b26f05 | 2008-08-31 00:39:46 +0200 | [diff] [blame] | 82 | davinci_eth_mdio_enable(); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 83 | } |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 84 | |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 85 | /* EMAC Addresses */ |
| 86 | static volatile emac_regs *adap_emac = (emac_regs *)EMAC_BASE_ADDR; |
| 87 | static volatile ewrap_regs *adap_ewrap = (ewrap_regs *)EMAC_WRAPPER_BASE_ADDR; |
| 88 | static volatile mdio_regs *adap_mdio = (mdio_regs *)EMAC_MDIO_BASE_ADDR; |
| 89 | |
| 90 | /* EMAC descriptors */ |
| 91 | static volatile emac_desc *emac_rx_desc = (emac_desc *)(EMAC_WRAPPER_RAM_ADDR + EMAC_RX_DESC_BASE); |
| 92 | static volatile emac_desc *emac_tx_desc = (emac_desc *)(EMAC_WRAPPER_RAM_ADDR + EMAC_TX_DESC_BASE); |
| 93 | static volatile emac_desc *emac_rx_active_head = 0; |
| 94 | static volatile emac_desc *emac_rx_active_tail = 0; |
| 95 | static int emac_rx_queue_active = 0; |
| 96 | |
| 97 | /* Receive packet buffers */ |
Ilya Yanok | ff67276 | 2011-11-28 06:37:33 +0000 | [diff] [blame] | 98 | static unsigned char emac_rx_buffers[EMAC_MAX_RX_BUFFERS * EMAC_RXBUF_SIZE] |
| 99 | __aligned(ARCH_DMA_MINALIGN); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 100 | |
Heiko Schocher | 7d037f7 | 2011-11-15 10:00:04 -0500 | [diff] [blame] | 101 | #ifndef CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT |
| 102 | #define CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT 3 |
| 103 | #endif |
Manjunath Hadli | 444d8c1 | 2011-10-13 03:40:54 +0000 | [diff] [blame] | 104 | |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 105 | /* PHY address for a discovered PHY (0xff - not found) */ |
Heiko Schocher | 7d037f7 | 2011-11-15 10:00:04 -0500 | [diff] [blame] | 106 | static u_int8_t active_phy_addr[CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT]; |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 107 | |
Manjunath Hadli | 444d8c1 | 2011-10-13 03:40:54 +0000 | [diff] [blame] | 108 | /* number of PHY found active */ |
| 109 | static u_int8_t num_phy; |
| 110 | |
Heiko Schocher | 7d037f7 | 2011-11-15 10:00:04 -0500 | [diff] [blame] | 111 | phy_t phy[CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT]; |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 112 | |
Bartosz Golaszewski | 2cedf75 | 2019-07-24 10:12:07 +0200 | [diff] [blame] | 113 | static int davinci_emac_write_hwaddr(struct udevice *dev) |
Ben Gardiner | 1fb49e3 | 2010-09-23 09:58:43 -0400 | [diff] [blame] | 114 | { |
Bartosz Golaszewski | 2cedf75 | 2019-07-24 10:12:07 +0200 | [diff] [blame] | 115 | struct eth_pdata *pdata = dev_get_platdata(dev); |
Ben Gardiner | 1fb49e3 | 2010-09-23 09:58:43 -0400 | [diff] [blame] | 116 | unsigned long mac_hi; |
| 117 | unsigned long mac_lo; |
| 118 | |
| 119 | /* |
| 120 | * Set MAC Addresses & Init multicast Hash to 0 (disable any multicast |
| 121 | * receive) |
| 122 | * Using channel 0 only - other channels are disabled |
| 123 | * */ |
| 124 | writel(0, &adap_emac->MACINDEX); |
Bartosz Golaszewski | 2cedf75 | 2019-07-24 10:12:07 +0200 | [diff] [blame] | 125 | mac_hi = (pdata->enetaddr[3] << 24) | |
| 126 | (pdata->enetaddr[2] << 16) | |
| 127 | (pdata->enetaddr[1] << 8) | |
| 128 | (pdata->enetaddr[0]); |
| 129 | mac_lo = (pdata->enetaddr[5] << 8) | |
| 130 | (pdata->enetaddr[4]); |
Ben Gardiner | 1fb49e3 | 2010-09-23 09:58:43 -0400 | [diff] [blame] | 131 | |
| 132 | writel(mac_hi, &adap_emac->MACADDRHI); |
| 133 | #if defined(DAVINCI_EMAC_VERSION2) |
| 134 | writel(mac_lo | EMAC_MAC_ADDR_IS_VALID | EMAC_MAC_ADDR_MATCH, |
| 135 | &adap_emac->MACADDRLO); |
| 136 | #else |
| 137 | writel(mac_lo, &adap_emac->MACADDRLO); |
| 138 | #endif |
| 139 | |
| 140 | writel(0, &adap_emac->MACHASH1); |
| 141 | writel(0, &adap_emac->MACHASH2); |
| 142 | |
| 143 | /* Set source MAC address - REQUIRED */ |
| 144 | writel(mac_hi, &adap_emac->MACSRCADDRHI); |
| 145 | writel(mac_lo, &adap_emac->MACSRCADDRLO); |
| 146 | |
| 147 | |
| 148 | return 0; |
| 149 | } |
| 150 | |
Sandeep Paulraj | 4b26f05 | 2008-08-31 00:39:46 +0200 | [diff] [blame] | 151 | static void davinci_eth_mdio_enable(void) |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 152 | { |
| 153 | u_int32_t clkdiv; |
| 154 | |
Heiko Schocher | 3e80613 | 2011-11-01 20:00:27 +0000 | [diff] [blame] | 155 | clkdiv = CONFIG_SYS_EMAC_TI_CLKDIV; |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 156 | |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 157 | writel((clkdiv & 0xff) | |
| 158 | MDIO_CONTROL_ENABLE | |
| 159 | MDIO_CONTROL_FAULT | |
| 160 | MDIO_CONTROL_FAULT_ENABLE, |
| 161 | &adap_mdio->CONTROL); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 162 | |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 163 | while (readl(&adap_mdio->CONTROL) & MDIO_CONTROL_IDLE) |
| 164 | ; |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 165 | } |
| 166 | |
| 167 | /* |
| 168 | * Tries to find an active connected PHY. Returns 1 if address if found. |
| 169 | * If no active PHY (or more than one PHY) found returns 0. |
| 170 | * Sets active_phy_addr variable. |
| 171 | */ |
Sandeep Paulraj | 4b26f05 | 2008-08-31 00:39:46 +0200 | [diff] [blame] | 172 | static int davinci_eth_phy_detect(void) |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 173 | { |
| 174 | u_int32_t phy_act_state; |
| 175 | int i; |
Manjunath Hadli | 444d8c1 | 2011-10-13 03:40:54 +0000 | [diff] [blame] | 176 | int j; |
| 177 | unsigned int count = 0; |
| 178 | |
Heiko Schocher | 7d037f7 | 2011-11-15 10:00:04 -0500 | [diff] [blame] | 179 | for (i = 0; i < CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT; i++) |
| 180 | active_phy_addr[i] = 0xff; |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 181 | |
Manjunath Hadli | 444d8c1 | 2011-10-13 03:40:54 +0000 | [diff] [blame] | 182 | udelay(1000); |
| 183 | phy_act_state = readl(&adap_mdio->ALIVE); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 184 | |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 185 | if (phy_act_state == 0) |
Manjunath Hadli | 444d8c1 | 2011-10-13 03:40:54 +0000 | [diff] [blame] | 186 | return 0; /* No active PHYs */ |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 187 | |
Sandeep Paulraj | 4b26f05 | 2008-08-31 00:39:46 +0200 | [diff] [blame] | 188 | debug_emac("davinci_eth_phy_detect(), ALIVE = 0x%08x\n", phy_act_state); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 189 | |
Manjunath Hadli | 444d8c1 | 2011-10-13 03:40:54 +0000 | [diff] [blame] | 190 | for (i = 0, j = 0; i < 32; i++) |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 191 | if (phy_act_state & (1 << i)) { |
Manjunath Hadli | 444d8c1 | 2011-10-13 03:40:54 +0000 | [diff] [blame] | 192 | count++; |
Prabhakar Lad | 60289fe | 2011-11-17 02:53:23 +0000 | [diff] [blame] | 193 | if (count <= CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT) { |
Heiko Schocher | 7d037f7 | 2011-11-15 10:00:04 -0500 | [diff] [blame] | 194 | active_phy_addr[j++] = i; |
| 195 | } else { |
| 196 | printf("%s: to many PHYs detected.\n", |
| 197 | __func__); |
| 198 | count = 0; |
| 199 | break; |
| 200 | } |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 201 | } |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 202 | |
Manjunath Hadli | 444d8c1 | 2011-10-13 03:40:54 +0000 | [diff] [blame] | 203 | num_phy = count; |
| 204 | |
| 205 | return count; |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 206 | } |
| 207 | |
| 208 | |
| 209 | /* Read a PHY register via MDIO inteface. Returns 1 on success, 0 otherwise */ |
Sandeep Paulraj | 4b26f05 | 2008-08-31 00:39:46 +0200 | [diff] [blame] | 210 | int davinci_eth_phy_read(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t *data) |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 211 | { |
| 212 | int tmp; |
| 213 | |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 214 | while (readl(&adap_mdio->USERACCESS0) & MDIO_USERACCESS0_GO) |
| 215 | ; |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 216 | |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 217 | writel(MDIO_USERACCESS0_GO | |
| 218 | MDIO_USERACCESS0_WRITE_READ | |
| 219 | ((reg_num & 0x1f) << 21) | |
| 220 | ((phy_addr & 0x1f) << 16), |
| 221 | &adap_mdio->USERACCESS0); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 222 | |
| 223 | /* Wait for command to complete */ |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 224 | while ((tmp = readl(&adap_mdio->USERACCESS0)) & MDIO_USERACCESS0_GO) |
| 225 | ; |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 226 | |
| 227 | if (tmp & MDIO_USERACCESS0_ACK) { |
| 228 | *data = tmp & 0xffff; |
karl beldan | 05d0698 | 2016-08-20 08:56:53 +0000 | [diff] [blame] | 229 | return 1; |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 230 | } |
| 231 | |
karl beldan | 05d0698 | 2016-08-20 08:56:53 +0000 | [diff] [blame] | 232 | return 0; |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 233 | } |
| 234 | |
| 235 | /* Write to a PHY register via MDIO inteface. Blocks until operation is complete. */ |
Sandeep Paulraj | 4b26f05 | 2008-08-31 00:39:46 +0200 | [diff] [blame] | 236 | int davinci_eth_phy_write(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t data) |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 237 | { |
| 238 | |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 239 | while (readl(&adap_mdio->USERACCESS0) & MDIO_USERACCESS0_GO) |
| 240 | ; |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 241 | |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 242 | writel(MDIO_USERACCESS0_GO | |
| 243 | MDIO_USERACCESS0_WRITE_WRITE | |
| 244 | ((reg_num & 0x1f) << 21) | |
| 245 | ((phy_addr & 0x1f) << 16) | |
| 246 | (data & 0xffff), |
| 247 | &adap_mdio->USERACCESS0); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 248 | |
| 249 | /* Wait for command to complete */ |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 250 | while (readl(&adap_mdio->USERACCESS0) & MDIO_USERACCESS0_GO) |
| 251 | ; |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 252 | |
karl beldan | 05d0698 | 2016-08-20 08:56:53 +0000 | [diff] [blame] | 253 | return 1; |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 254 | } |
| 255 | |
| 256 | /* PHY functions for a generic PHY */ |
| 257 | static int gen_init_phy(int phy_addr) |
| 258 | { |
| 259 | int ret = 1; |
| 260 | |
| 261 | if (gen_get_link_speed(phy_addr)) { |
| 262 | /* Try another time */ |
| 263 | ret = gen_get_link_speed(phy_addr); |
| 264 | } |
| 265 | |
| 266 | return(ret); |
| 267 | } |
| 268 | |
| 269 | static int gen_is_phy_connected(int phy_addr) |
| 270 | { |
| 271 | u_int16_t dummy; |
| 272 | |
Manjunath Hadli | 444d8c1 | 2011-10-13 03:40:54 +0000 | [diff] [blame] | 273 | return davinci_eth_phy_read(phy_addr, MII_PHYSID1, &dummy); |
| 274 | } |
| 275 | |
| 276 | static int get_active_phy(void) |
| 277 | { |
| 278 | int i; |
| 279 | |
| 280 | for (i = 0; i < num_phy; i++) |
| 281 | if (phy[i].get_link_speed(active_phy_addr[i])) |
| 282 | return i; |
| 283 | |
| 284 | return -1; /* Return error if no link */ |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 285 | } |
| 286 | |
| 287 | static int gen_get_link_speed(int phy_addr) |
| 288 | { |
| 289 | u_int16_t tmp; |
| 290 | |
Sudhakar Rajashekhara | 5851e12 | 2010-11-18 09:59:37 -0500 | [diff] [blame] | 291 | if (davinci_eth_phy_read(phy_addr, MII_STATUS_REG, &tmp) && |
| 292 | (tmp & 0x04)) { |
| 293 | #if defined(CONFIG_DRIVER_TI_EMAC_USE_RMII) && \ |
| 294 | defined(CONFIG_MACH_DAVINCI_DA850_EVM) |
Ben Gardiner | b936eaa | 2011-01-11 14:48:17 -0500 | [diff] [blame] | 295 | davinci_eth_phy_read(phy_addr, MII_LPA, &tmp); |
Sudhakar Rajashekhara | 5851e12 | 2010-11-18 09:59:37 -0500 | [diff] [blame] | 296 | |
| 297 | /* Speed doesn't matter, there is no setting for it in EMAC. */ |
Ben Gardiner | b936eaa | 2011-01-11 14:48:17 -0500 | [diff] [blame] | 298 | if (tmp & (LPA_100FULL | LPA_10FULL)) { |
Sudhakar Rajashekhara | 5851e12 | 2010-11-18 09:59:37 -0500 | [diff] [blame] | 299 | /* set EMAC for Full Duplex */ |
| 300 | writel(EMAC_MACCONTROL_MIIEN_ENABLE | |
| 301 | EMAC_MACCONTROL_FULLDUPLEX_ENABLE, |
| 302 | &adap_emac->MACCONTROL); |
| 303 | } else { |
| 304 | /*set EMAC for Half Duplex */ |
| 305 | writel(EMAC_MACCONTROL_MIIEN_ENABLE, |
| 306 | &adap_emac->MACCONTROL); |
| 307 | } |
| 308 | |
Ben Gardiner | b936eaa | 2011-01-11 14:48:17 -0500 | [diff] [blame] | 309 | if (tmp & (LPA_100FULL | LPA_100HALF)) |
Sudhakar Rajashekhara | 5851e12 | 2010-11-18 09:59:37 -0500 | [diff] [blame] | 310 | writel(readl(&adap_emac->MACCONTROL) | |
| 311 | EMAC_MACCONTROL_RMIISPEED_100, |
| 312 | &adap_emac->MACCONTROL); |
| 313 | else |
| 314 | writel(readl(&adap_emac->MACCONTROL) & |
| 315 | ~EMAC_MACCONTROL_RMIISPEED_100, |
| 316 | &adap_emac->MACCONTROL); |
| 317 | #endif |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 318 | return(1); |
Sudhakar Rajashekhara | 5851e12 | 2010-11-18 09:59:37 -0500 | [diff] [blame] | 319 | } |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 320 | |
| 321 | return(0); |
| 322 | } |
| 323 | |
| 324 | static int gen_auto_negotiate(int phy_addr) |
| 325 | { |
| 326 | u_int16_t tmp; |
Manjunath Hadli | 4141ad4 | 2011-10-13 03:40:53 +0000 | [diff] [blame] | 327 | u_int16_t val; |
| 328 | unsigned long cntr = 0; |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 329 | |
Mike Frysinger | d63ee71 | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 330 | if (!davinci_eth_phy_read(phy_addr, MII_BMCR, &tmp)) |
Manjunath Hadli | 4141ad4 | 2011-10-13 03:40:53 +0000 | [diff] [blame] | 331 | return 0; |
| 332 | |
| 333 | val = tmp | BMCR_FULLDPLX | BMCR_ANENABLE | |
| 334 | BMCR_SPEED100; |
| 335 | davinci_eth_phy_write(phy_addr, MII_BMCR, val); |
| 336 | |
| 337 | if (!davinci_eth_phy_read(phy_addr, MII_ADVERTISE, &val)) |
| 338 | return 0; |
| 339 | |
| 340 | val |= (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | |
| 341 | ADVERTISE_10HALF); |
| 342 | davinci_eth_phy_write(phy_addr, MII_ADVERTISE, val); |
| 343 | |
| 344 | if (!davinci_eth_phy_read(phy_addr, MII_BMCR, &tmp)) |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 345 | return(0); |
| 346 | |
Tom Rini | c3cf899 | 2017-05-10 12:01:02 -0400 | [diff] [blame] | 347 | #ifdef DAVINCI_EMAC_GIG_ENABLE |
| 348 | davinci_eth_phy_read(phy_addr, MII_CTRL1000, &val); |
| 349 | val |= PHY_1000BTCR_1000FD; |
| 350 | val &= ~PHY_1000BTCR_1000HD; |
| 351 | davinci_eth_phy_write(phy_addr, MII_CTRL1000, val); |
| 352 | davinci_eth_phy_read(phy_addr, MII_CTRL1000, &val); |
| 353 | #endif |
| 354 | |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 355 | /* Restart Auto_negotiation */ |
Manjunath Hadli | 4141ad4 | 2011-10-13 03:40:53 +0000 | [diff] [blame] | 356 | tmp |= BMCR_ANRESTART; |
Mike Frysinger | d63ee71 | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 357 | davinci_eth_phy_write(phy_addr, MII_BMCR, tmp); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 358 | |
| 359 | /*check AutoNegotiate complete */ |
Manjunath Hadli | 4141ad4 | 2011-10-13 03:40:53 +0000 | [diff] [blame] | 360 | do { |
| 361 | udelay(40000); |
| 362 | if (!davinci_eth_phy_read(phy_addr, MII_BMSR, &tmp)) |
| 363 | return 0; |
| 364 | |
| 365 | if (tmp & BMSR_ANEGCOMPLETE) |
| 366 | break; |
| 367 | |
| 368 | cntr++; |
| 369 | } while (cntr < 200); |
| 370 | |
Mike Frysinger | d63ee71 | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 371 | if (!davinci_eth_phy_read(phy_addr, MII_BMSR, &tmp)) |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 372 | return(0); |
| 373 | |
Mike Frysinger | d63ee71 | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 374 | if (!(tmp & BMSR_ANEGCOMPLETE)) |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 375 | return(0); |
| 376 | |
| 377 | return(gen_get_link_speed(phy_addr)); |
| 378 | } |
| 379 | /* End of generic PHY functions */ |
| 380 | |
| 381 | |
Wolfgang Denk | 56cbd02 | 2007-08-12 14:27:39 +0200 | [diff] [blame] | 382 | #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) |
Joe Hershberger | 1fbcbed | 2016-08-08 11:28:38 -0500 | [diff] [blame] | 383 | static int davinci_mii_phy_read(struct mii_dev *bus, int addr, int devad, |
| 384 | int reg) |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 385 | { |
Joe Hershberger | 1fbcbed | 2016-08-08 11:28:38 -0500 | [diff] [blame] | 386 | unsigned short value = 0; |
Joe Hershberger | ece1aa6 | 2016-08-08 11:28:40 -0500 | [diff] [blame] | 387 | int retval = davinci_eth_phy_read(addr, reg, &value); |
karl beldan | 05d0698 | 2016-08-20 08:56:53 +0000 | [diff] [blame] | 388 | |
| 389 | return retval ? value : -EIO; |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 390 | } |
| 391 | |
Joe Hershberger | 1fbcbed | 2016-08-08 11:28:38 -0500 | [diff] [blame] | 392 | static int davinci_mii_phy_write(struct mii_dev *bus, int addr, int devad, |
| 393 | int reg, u16 value) |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 394 | { |
karl beldan | 05d0698 | 2016-08-20 08:56:53 +0000 | [diff] [blame] | 395 | return davinci_eth_phy_write(addr, reg, value) ? 0 : 1; |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 396 | } |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 397 | #endif |
| 398 | |
Manjunath Hadli | 5b5260e | 2011-10-13 03:40:55 +0000 | [diff] [blame] | 399 | static void __attribute__((unused)) davinci_eth_gigabit_enable(int phy_addr) |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 400 | { |
| 401 | u_int16_t data; |
| 402 | |
Manjunath Hadli | 5b5260e | 2011-10-13 03:40:55 +0000 | [diff] [blame] | 403 | if (davinci_eth_phy_read(phy_addr, 0, &data)) { |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 404 | if (data & (1 << 6)) { /* speed selection MSB */ |
| 405 | /* |
| 406 | * Check if link detected is giga-bit |
| 407 | * If Gigabit mode detected, enable gigbit in MAC |
| 408 | */ |
Sandeep Paulraj | 9da994b | 2010-12-28 14:37:33 -0500 | [diff] [blame] | 409 | writel(readl(&adap_emac->MACCONTROL) | |
| 410 | EMAC_MACCONTROL_GIGFORCE | |
| 411 | EMAC_MACCONTROL_GIGABIT_ENABLE, |
| 412 | &adap_emac->MACCONTROL); |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 413 | } |
| 414 | } |
| 415 | } |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 416 | |
| 417 | /* Eth device open */ |
Bartosz Golaszewski | 2cedf75 | 2019-07-24 10:12:07 +0200 | [diff] [blame] | 418 | static int davinci_emac_start(struct udevice *dev) |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 419 | { |
| 420 | dv_reg_p addr; |
Tom Rini | c3cf899 | 2017-05-10 12:01:02 -0400 | [diff] [blame] | 421 | u_int32_t clkdiv, cnt, mac_control; |
| 422 | uint16_t __maybe_unused lpa_val; |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 423 | volatile emac_desc *rx_desc; |
Manjunath Hadli | 444d8c1 | 2011-10-13 03:40:54 +0000 | [diff] [blame] | 424 | int index; |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 425 | |
| 426 | debug_emac("+ emac_open\n"); |
| 427 | |
| 428 | /* Reset EMAC module and disable interrupts in wrapper */ |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 429 | writel(1, &adap_emac->SOFTRESET); |
| 430 | while (readl(&adap_emac->SOFTRESET) != 0) |
| 431 | ; |
| 432 | #if defined(DAVINCI_EMAC_VERSION2) |
| 433 | writel(1, &adap_ewrap->softrst); |
| 434 | while (readl(&adap_ewrap->softrst) != 0) |
| 435 | ; |
| 436 | #else |
| 437 | writel(0, &adap_ewrap->EWCTL); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 438 | for (cnt = 0; cnt < 5; cnt++) { |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 439 | clkdiv = readl(&adap_ewrap->EWCTL); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 440 | } |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 441 | #endif |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 442 | |
Sudhakar Rajashekhara | 5851e12 | 2010-11-18 09:59:37 -0500 | [diff] [blame] | 443 | #if defined(CONFIG_DRIVER_TI_EMAC_USE_RMII) && \ |
| 444 | defined(CONFIG_MACH_DAVINCI_DA850_EVM) |
| 445 | adap_ewrap->c0rxen = adap_ewrap->c1rxen = adap_ewrap->c2rxen = 0; |
| 446 | adap_ewrap->c0txen = adap_ewrap->c1txen = adap_ewrap->c2txen = 0; |
| 447 | adap_ewrap->c0miscen = adap_ewrap->c1miscen = adap_ewrap->c2miscen = 0; |
| 448 | #endif |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 449 | rx_desc = emac_rx_desc; |
| 450 | |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 451 | writel(1, &adap_emac->TXCONTROL); |
| 452 | writel(1, &adap_emac->RXCONTROL); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 453 | |
Bartosz Golaszewski | 2cedf75 | 2019-07-24 10:12:07 +0200 | [diff] [blame] | 454 | davinci_emac_write_hwaddr(dev); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 455 | |
| 456 | /* Set DMA 8 TX / 8 RX Head pointers to 0 */ |
| 457 | addr = &adap_emac->TX0HDP; |
Vishwas Srivastava | 8aaeb1f | 2016-01-25 21:28:17 +0530 | [diff] [blame] | 458 | for (cnt = 0; cnt < 8; cnt++) |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 459 | writel(0, addr++); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 460 | |
| 461 | addr = &adap_emac->RX0HDP; |
Vishwas Srivastava | 8aaeb1f | 2016-01-25 21:28:17 +0530 | [diff] [blame] | 462 | for (cnt = 0; cnt < 8; cnt++) |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 463 | writel(0, addr++); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 464 | |
| 465 | /* Clear Statistics (do this before setting MacControl register) */ |
| 466 | addr = &adap_emac->RXGOODFRAMES; |
| 467 | for(cnt = 0; cnt < EMAC_NUM_STATS; cnt++) |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 468 | writel(0, addr++); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 469 | |
| 470 | /* No multicast addressing */ |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 471 | writel(0, &adap_emac->MACHASH1); |
| 472 | writel(0, &adap_emac->MACHASH2); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 473 | |
| 474 | /* Create RX queue and set receive process in place */ |
| 475 | emac_rx_active_head = emac_rx_desc; |
| 476 | for (cnt = 0; cnt < EMAC_MAX_RX_BUFFERS; cnt++) { |
Ilya Yanok | 518036e | 2011-11-28 06:37:30 +0000 | [diff] [blame] | 477 | rx_desc->next = BD_TO_HW((u_int32_t)(rx_desc + 1)); |
Ilya Yanok | ff67276 | 2011-11-28 06:37:33 +0000 | [diff] [blame] | 478 | rx_desc->buffer = &emac_rx_buffers[cnt * EMAC_RXBUF_SIZE]; |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 479 | rx_desc->buff_off_len = EMAC_MAX_ETHERNET_PKT_SIZE; |
| 480 | rx_desc->pkt_flag_len = EMAC_CPPI_OWNERSHIP_BIT; |
| 481 | rx_desc++; |
| 482 | } |
| 483 | |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 484 | /* Finalize the rx desc list */ |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 485 | rx_desc--; |
| 486 | rx_desc->next = 0; |
| 487 | emac_rx_active_tail = rx_desc; |
| 488 | emac_rx_queue_active = 1; |
| 489 | |
| 490 | /* Enable TX/RX */ |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 491 | writel(EMAC_MAX_ETHERNET_PKT_SIZE, &adap_emac->RXMAXLEN); |
| 492 | writel(0, &adap_emac->RXBUFFEROFFSET); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 493 | |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 494 | /* |
| 495 | * No fancy configs - Use this for promiscous debug |
| 496 | * - EMAC_RXMBPENABLE_RXCAFEN_ENABLE |
| 497 | */ |
| 498 | writel(EMAC_RXMBPENABLE_RXBROADEN, &adap_emac->RXMBPENABLE); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 499 | |
| 500 | /* Enable ch 0 only */ |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 501 | writel(1, &adap_emac->RXUNICASTSET); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 502 | |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 503 | /* Init MDIO & get link state */ |
Heiko Schocher | 3e80613 | 2011-11-01 20:00:27 +0000 | [diff] [blame] | 504 | clkdiv = CONFIG_SYS_EMAC_TI_CLKDIV; |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 505 | writel((clkdiv & 0xff) | MDIO_CONTROL_ENABLE | MDIO_CONTROL_FAULT, |
| 506 | &adap_mdio->CONTROL); |
| 507 | |
| 508 | /* We need to wait for MDIO to start */ |
| 509 | udelay(1000); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 510 | |
Manjunath Hadli | 444d8c1 | 2011-10-13 03:40:54 +0000 | [diff] [blame] | 511 | index = get_active_phy(); |
| 512 | if (index == -1) |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 513 | return(0); |
| 514 | |
Tom Rini | c3cf899 | 2017-05-10 12:01:02 -0400 | [diff] [blame] | 515 | /* Enable MII interface */ |
| 516 | mac_control = EMAC_MACCONTROL_MIIEN_ENABLE; |
| 517 | #ifdef DAVINCI_EMAC_GIG_ENABLE |
| 518 | davinci_eth_phy_read(active_phy_addr[index], MII_STAT1000, &lpa_val); |
| 519 | if (lpa_val & PHY_1000BTSR_1000FD) { |
| 520 | debug_emac("eth_open : gigabit negotiated\n"); |
| 521 | mac_control |= EMAC_MACCONTROL_FULLDUPLEX_ENABLE; |
| 522 | mac_control |= EMAC_MACCONTROL_GIGABIT_ENABLE; |
| 523 | } |
| 524 | #endif |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 525 | |
Tom Rini | c3cf899 | 2017-05-10 12:01:02 -0400 | [diff] [blame] | 526 | davinci_eth_phy_read(active_phy_addr[index], MII_LPA, &lpa_val); |
| 527 | if (lpa_val & (LPA_100FULL | LPA_10FULL)) |
| 528 | /* set EMAC for Full Duplex */ |
| 529 | mac_control |= EMAC_MACCONTROL_FULLDUPLEX_ENABLE; |
| 530 | #if defined(CONFIG_SOC_DA8XX) || \ |
| 531 | (defined(CONFIG_OMAP34XX) && defined(CONFIG_DRIVER_TI_EMAC_USE_RMII)) |
| 532 | mac_control |= EMAC_MACCONTROL_RMIISPEED_100; |
| 533 | #endif |
| 534 | writel(mac_control, &adap_emac->MACCONTROL); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 535 | /* Start receive process */ |
Ilya Yanok | 518036e | 2011-11-28 06:37:30 +0000 | [diff] [blame] | 536 | writel(BD_TO_HW((u_int32_t)emac_rx_desc), &adap_emac->RX0HDP); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 537 | |
| 538 | debug_emac("- emac_open\n"); |
| 539 | |
| 540 | return(1); |
| 541 | } |
| 542 | |
| 543 | /* EMAC Channel Teardown */ |
Sandeep Paulraj | 4b26f05 | 2008-08-31 00:39:46 +0200 | [diff] [blame] | 544 | static void davinci_eth_ch_teardown(int ch) |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 545 | { |
| 546 | dv_reg dly = 0xff; |
| 547 | dv_reg cnt; |
| 548 | |
| 549 | debug_emac("+ emac_ch_teardown\n"); |
| 550 | |
| 551 | if (ch == EMAC_CH_TX) { |
| 552 | /* Init TX channel teardown */ |
Nagabhushana Netagunte | a33bc4b | 2011-09-03 22:20:33 -0400 | [diff] [blame] | 553 | writel(0, &adap_emac->TXTEARDOWN); |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 554 | do { |
| 555 | /* |
| 556 | * Wait here for Tx teardown completion interrupt to |
| 557 | * occur. Note: A task delay can be called here to pend |
| 558 | * rather than occupying CPU cycles - anyway it has |
| 559 | * been found that teardown takes very few cpu cycles |
| 560 | * and does not affect functionality |
| 561 | */ |
| 562 | dly--; |
| 563 | udelay(1); |
| 564 | if (dly == 0) |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 565 | break; |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 566 | cnt = readl(&adap_emac->TX0CP); |
| 567 | } while (cnt != 0xfffffffc); |
| 568 | writel(cnt, &adap_emac->TX0CP); |
| 569 | writel(0, &adap_emac->TX0HDP); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 570 | } else { |
| 571 | /* Init RX channel teardown */ |
Nagabhushana Netagunte | a33bc4b | 2011-09-03 22:20:33 -0400 | [diff] [blame] | 572 | writel(0, &adap_emac->RXTEARDOWN); |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 573 | do { |
| 574 | /* |
| 575 | * Wait here for Rx teardown completion interrupt to |
| 576 | * occur. Note: A task delay can be called here to pend |
| 577 | * rather than occupying CPU cycles - anyway it has |
| 578 | * been found that teardown takes very few cpu cycles |
| 579 | * and does not affect functionality |
| 580 | */ |
| 581 | dly--; |
| 582 | udelay(1); |
| 583 | if (dly == 0) |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 584 | break; |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 585 | cnt = readl(&adap_emac->RX0CP); |
| 586 | } while (cnt != 0xfffffffc); |
| 587 | writel(cnt, &adap_emac->RX0CP); |
| 588 | writel(0, &adap_emac->RX0HDP); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 589 | } |
| 590 | |
| 591 | debug_emac("- emac_ch_teardown\n"); |
| 592 | } |
| 593 | |
| 594 | /* Eth device close */ |
Bartosz Golaszewski | 2cedf75 | 2019-07-24 10:12:07 +0200 | [diff] [blame] | 595 | static void davinci_emac_stop(struct udevice *dev) |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 596 | { |
| 597 | debug_emac("+ emac_close\n"); |
| 598 | |
Sandeep Paulraj | 4b26f05 | 2008-08-31 00:39:46 +0200 | [diff] [blame] | 599 | davinci_eth_ch_teardown(EMAC_CH_TX); /* TX Channel teardown */ |
Jeroen Hofstee | 8938b5b | 2015-06-07 17:30:38 +0200 | [diff] [blame] | 600 | if (readl(&adap_emac->RXCONTROL) & 1) |
| 601 | davinci_eth_ch_teardown(EMAC_CH_RX); /* RX Channel teardown */ |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 602 | |
| 603 | /* Reset EMAC module and disable interrupts in wrapper */ |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 604 | writel(1, &adap_emac->SOFTRESET); |
| 605 | #if defined(DAVINCI_EMAC_VERSION2) |
| 606 | writel(1, &adap_ewrap->softrst); |
| 607 | #else |
| 608 | writel(0, &adap_ewrap->EWCTL); |
| 609 | #endif |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 610 | |
Sudhakar Rajashekhara | 5851e12 | 2010-11-18 09:59:37 -0500 | [diff] [blame] | 611 | #if defined(CONFIG_DRIVER_TI_EMAC_USE_RMII) && \ |
| 612 | defined(CONFIG_MACH_DAVINCI_DA850_EVM) |
| 613 | adap_ewrap->c0rxen = adap_ewrap->c1rxen = adap_ewrap->c2rxen = 0; |
| 614 | adap_ewrap->c0txen = adap_ewrap->c1txen = adap_ewrap->c2txen = 0; |
| 615 | adap_ewrap->c0miscen = adap_ewrap->c1miscen = adap_ewrap->c2miscen = 0; |
| 616 | #endif |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 617 | debug_emac("- emac_close\n"); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 618 | } |
| 619 | |
| 620 | static int tx_send_loop = 0; |
| 621 | |
| 622 | /* |
| 623 | * This function sends a single packet on the network and returns |
| 624 | * positive number (number of bytes transmitted) or negative for error |
| 625 | */ |
Bartosz Golaszewski | 2cedf75 | 2019-07-24 10:12:07 +0200 | [diff] [blame] | 626 | static int davinci_emac_send(struct udevice *dev, |
| 627 | void *packet, int length) |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 628 | { |
| 629 | int ret_status = -1; |
Manjunath Hadli | 444d8c1 | 2011-10-13 03:40:54 +0000 | [diff] [blame] | 630 | int index; |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 631 | tx_send_loop = 0; |
| 632 | |
Manjunath Hadli | 444d8c1 | 2011-10-13 03:40:54 +0000 | [diff] [blame] | 633 | index = get_active_phy(); |
| 634 | if (index == -1) { |
| 635 | printf(" WARN: emac_send_packet: No link\n"); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 636 | return (ret_status); |
| 637 | } |
| 638 | |
| 639 | /* Check packet size and if < EMAC_MIN_ETHERNET_PKT_SIZE, pad it up */ |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 640 | if (length < EMAC_MIN_ETHERNET_PKT_SIZE) { |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 641 | length = EMAC_MIN_ETHERNET_PKT_SIZE; |
| 642 | } |
| 643 | |
| 644 | /* Populate the TX descriptor */ |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 645 | emac_tx_desc->next = 0; |
| 646 | emac_tx_desc->buffer = (u_int8_t *) packet; |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 647 | emac_tx_desc->buff_off_len = (length & 0xffff); |
| 648 | emac_tx_desc->pkt_flag_len = ((length & 0xffff) | |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 649 | EMAC_CPPI_SOP_BIT | |
| 650 | EMAC_CPPI_OWNERSHIP_BIT | |
| 651 | EMAC_CPPI_EOP_BIT); |
Ilya Yanok | ff67276 | 2011-11-28 06:37:33 +0000 | [diff] [blame] | 652 | |
| 653 | flush_dcache_range((unsigned long)packet, |
karl beldan | e24ce8b | 2016-08-15 17:23:00 +0000 | [diff] [blame] | 654 | (unsigned long)packet + ALIGN(length, PKTALIGN)); |
Ilya Yanok | ff67276 | 2011-11-28 06:37:33 +0000 | [diff] [blame] | 655 | |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 656 | /* Send the packet */ |
Ilya Yanok | 518036e | 2011-11-28 06:37:30 +0000 | [diff] [blame] | 657 | writel(BD_TO_HW((unsigned long)emac_tx_desc), &adap_emac->TX0HDP); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 658 | |
| 659 | /* Wait for packet to complete or link down */ |
| 660 | while (1) { |
Manjunath Hadli | 444d8c1 | 2011-10-13 03:40:54 +0000 | [diff] [blame] | 661 | if (!phy[index].get_link_speed(active_phy_addr[index])) { |
Sandeep Paulraj | 4b26f05 | 2008-08-31 00:39:46 +0200 | [diff] [blame] | 662 | davinci_eth_ch_teardown (EMAC_CH_TX); |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 663 | return (ret_status); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 664 | } |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 665 | |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 666 | if (readl(&adap_emac->TXINTSTATRAW) & 0x01) { |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 667 | ret_status = length; |
| 668 | break; |
| 669 | } |
| 670 | tx_send_loop++; |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 671 | } |
| 672 | |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 673 | return (ret_status); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 674 | } |
| 675 | |
| 676 | /* |
| 677 | * This function handles receipt of a packet from the network |
| 678 | */ |
Bartosz Golaszewski | 2cedf75 | 2019-07-24 10:12:07 +0200 | [diff] [blame] | 679 | static int davinci_emac_recv(struct udevice *dev, int flags, uchar **packetp) |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 680 | { |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 681 | volatile emac_desc *rx_curr_desc; |
| 682 | volatile emac_desc *curr_desc; |
| 683 | volatile emac_desc *tail_desc; |
| 684 | int status, ret = -1; |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 685 | |
| 686 | rx_curr_desc = emac_rx_active_head; |
Vishwas Srivastava | c994c9c | 2016-01-26 12:46:42 +0530 | [diff] [blame] | 687 | if (!rx_curr_desc) |
| 688 | return 0; |
Bartosz Golaszewski | 2cedf75 | 2019-07-24 10:12:07 +0200 | [diff] [blame] | 689 | *packetp = rx_curr_desc->buffer; |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 690 | status = rx_curr_desc->pkt_flag_len; |
Vishwas Srivastava | c994c9c | 2016-01-26 12:46:42 +0530 | [diff] [blame] | 691 | if ((status & EMAC_CPPI_OWNERSHIP_BIT) == 0) { |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 692 | if (status & EMAC_CPPI_RX_ERROR_FRAME) { |
| 693 | /* Error in packet - discard it and requeue desc */ |
| 694 | printf ("WARN: emac_rcv_pkt: Error in packet\n"); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 695 | } else { |
Ilya Yanok | ff67276 | 2011-11-28 06:37:33 +0000 | [diff] [blame] | 696 | unsigned long tmp = (unsigned long)rx_curr_desc->buffer; |
karl beldan | 12e4987 | 2016-08-15 17:23:01 +0000 | [diff] [blame] | 697 | unsigned short len = |
| 698 | rx_curr_desc->buff_off_len & 0xffff; |
Ilya Yanok | ff67276 | 2011-11-28 06:37:33 +0000 | [diff] [blame] | 699 | |
karl beldan | 12e4987 | 2016-08-15 17:23:01 +0000 | [diff] [blame] | 700 | invalidate_dcache_range(tmp, tmp + ALIGN(len, PKTALIGN)); |
karl beldan | 12e4987 | 2016-08-15 17:23:01 +0000 | [diff] [blame] | 701 | ret = len; |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 702 | } |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 703 | |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 704 | /* Ack received packet descriptor */ |
Ilya Yanok | 518036e | 2011-11-28 06:37:30 +0000 | [diff] [blame] | 705 | writel(BD_TO_HW((ulong)rx_curr_desc), &adap_emac->RX0CP); |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 706 | curr_desc = rx_curr_desc; |
| 707 | emac_rx_active_head = |
Ilya Yanok | 518036e | 2011-11-28 06:37:30 +0000 | [diff] [blame] | 708 | (volatile emac_desc *) (HW_TO_BD(rx_curr_desc->next)); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 709 | |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 710 | if (status & EMAC_CPPI_EOQ_BIT) { |
| 711 | if (emac_rx_active_head) { |
Ilya Yanok | 518036e | 2011-11-28 06:37:30 +0000 | [diff] [blame] | 712 | writel(BD_TO_HW((ulong)emac_rx_active_head), |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 713 | &adap_emac->RX0HDP); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 714 | } else { |
| 715 | emac_rx_queue_active = 0; |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 716 | printf ("INFO:emac_rcv_packet: RX Queue not active\n"); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 717 | } |
| 718 | } |
| 719 | |
| 720 | /* Recycle RX descriptor */ |
| 721 | rx_curr_desc->buff_off_len = EMAC_MAX_ETHERNET_PKT_SIZE; |
| 722 | rx_curr_desc->pkt_flag_len = EMAC_CPPI_OWNERSHIP_BIT; |
| 723 | rx_curr_desc->next = 0; |
| 724 | |
| 725 | if (emac_rx_active_head == 0) { |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 726 | printf ("INFO: emac_rcv_pkt: active queue head = 0\n"); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 727 | emac_rx_active_head = curr_desc; |
| 728 | emac_rx_active_tail = curr_desc; |
| 729 | if (emac_rx_queue_active != 0) { |
Ilya Yanok | 518036e | 2011-11-28 06:37:30 +0000 | [diff] [blame] | 730 | writel(BD_TO_HW((ulong)emac_rx_active_head), |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 731 | &adap_emac->RX0HDP); |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 732 | printf ("INFO: emac_rcv_pkt: active queue head = 0, HDP fired\n"); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 733 | emac_rx_queue_active = 1; |
| 734 | } |
| 735 | } else { |
| 736 | tail_desc = emac_rx_active_tail; |
| 737 | emac_rx_active_tail = curr_desc; |
Ilya Yanok | 518036e | 2011-11-28 06:37:30 +0000 | [diff] [blame] | 738 | tail_desc->next = BD_TO_HW((ulong) curr_desc); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 739 | status = tail_desc->pkt_flag_len; |
| 740 | if (status & EMAC_CPPI_EOQ_BIT) { |
Ilya Yanok | 518036e | 2011-11-28 06:37:30 +0000 | [diff] [blame] | 741 | writel(BD_TO_HW((ulong)curr_desc), |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 742 | &adap_emac->RX0HDP); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 743 | status &= ~EMAC_CPPI_EOQ_BIT; |
| 744 | tail_desc->pkt_flag_len = status; |
| 745 | } |
| 746 | } |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 747 | return (ret); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 748 | } |
Bartosz Golaszewski | 2cedf75 | 2019-07-24 10:12:07 +0200 | [diff] [blame] | 749 | |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 750 | return (0); |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 751 | } |
| 752 | |
Ben Warren | 4c28e27 | 2009-04-27 23:19:10 -0700 | [diff] [blame] | 753 | /* |
| 754 | * This function initializes the emac hardware. It does NOT initialize |
| 755 | * EMAC modules power or pin multiplexors, that is done by board_init() |
| 756 | * much earlier in bootup process. Returns 1 on success, 0 otherwise. |
| 757 | */ |
Bartosz Golaszewski | 2cedf75 | 2019-07-24 10:12:07 +0200 | [diff] [blame] | 758 | static int davinci_emac_probe(struct udevice *dev) |
Ben Warren | 4c28e27 | 2009-04-27 23:19:10 -0700 | [diff] [blame] | 759 | { |
| 760 | u_int32_t phy_id; |
| 761 | u_int16_t tmp; |
| 762 | int i; |
Manjunath Hadli | 444d8c1 | 2011-10-13 03:40:54 +0000 | [diff] [blame] | 763 | int ret; |
Ben Warren | 4c28e27 | 2009-04-27 23:19:10 -0700 | [diff] [blame] | 764 | |
| 765 | davinci_eth_mdio_enable(); |
| 766 | |
Heiko Schocher | 70fa966 | 2011-09-14 19:37:42 +0000 | [diff] [blame] | 767 | /* let the EMAC detect the PHYs */ |
| 768 | udelay(5000); |
| 769 | |
Ben Warren | 4c28e27 | 2009-04-27 23:19:10 -0700 | [diff] [blame] | 770 | for (i = 0; i < 256; i++) { |
Nick Thompson | d5ee6f6 | 2009-12-18 13:33:07 +0000 | [diff] [blame] | 771 | if (readl(&adap_mdio->ALIVE)) |
Ben Warren | 4c28e27 | 2009-04-27 23:19:10 -0700 | [diff] [blame] | 772 | break; |
Manjunath Hadli | 444d8c1 | 2011-10-13 03:40:54 +0000 | [diff] [blame] | 773 | udelay(1000); |
Ben Warren | 4c28e27 | 2009-04-27 23:19:10 -0700 | [diff] [blame] | 774 | } |
| 775 | |
| 776 | if (i >= 256) { |
| 777 | printf("No ETH PHY detected!!!\n"); |
| 778 | return(0); |
| 779 | } |
| 780 | |
Manjunath Hadli | 444d8c1 | 2011-10-13 03:40:54 +0000 | [diff] [blame] | 781 | /* Find if PHY(s) is/are connected */ |
| 782 | ret = davinci_eth_phy_detect(); |
| 783 | if (!ret) |
Ben Warren | 4c28e27 | 2009-04-27 23:19:10 -0700 | [diff] [blame] | 784 | return(0); |
Manjunath Hadli | 444d8c1 | 2011-10-13 03:40:54 +0000 | [diff] [blame] | 785 | else |
Heiko Schocher | 7d037f7 | 2011-11-15 10:00:04 -0500 | [diff] [blame] | 786 | debug_emac(" %d ETH PHY detected\n", ret); |
Ben Warren | 4c28e27 | 2009-04-27 23:19:10 -0700 | [diff] [blame] | 787 | |
| 788 | /* Get PHY ID and initialize phy_ops for a detected PHY */ |
Manjunath Hadli | 444d8c1 | 2011-10-13 03:40:54 +0000 | [diff] [blame] | 789 | for (i = 0; i < num_phy; i++) { |
| 790 | if (!davinci_eth_phy_read(active_phy_addr[i], MII_PHYSID1, |
| 791 | &tmp)) { |
| 792 | active_phy_addr[i] = 0xff; |
| 793 | continue; |
| 794 | } |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 795 | |
Manjunath Hadli | 444d8c1 | 2011-10-13 03:40:54 +0000 | [diff] [blame] | 796 | phy_id = (tmp << 16) & 0xffff0000; |
Ben Warren | 4c28e27 | 2009-04-27 23:19:10 -0700 | [diff] [blame] | 797 | |
Manjunath Hadli | 444d8c1 | 2011-10-13 03:40:54 +0000 | [diff] [blame] | 798 | if (!davinci_eth_phy_read(active_phy_addr[i], MII_PHYSID2, |
| 799 | &tmp)) { |
| 800 | active_phy_addr[i] = 0xff; |
| 801 | continue; |
| 802 | } |
Ben Warren | 4c28e27 | 2009-04-27 23:19:10 -0700 | [diff] [blame] | 803 | |
Manjunath Hadli | 444d8c1 | 2011-10-13 03:40:54 +0000 | [diff] [blame] | 804 | phy_id |= tmp & 0x0000ffff; |
Ben Warren | 4c28e27 | 2009-04-27 23:19:10 -0700 | [diff] [blame] | 805 | |
Bartosz Golaszewski | 101c5ba | 2019-04-29 18:37:08 +0200 | [diff] [blame] | 806 | sprintf(phy[i].name, "GENERIC @ 0x%02x", |
| 807 | active_phy_addr[i]); |
| 808 | phy[i].init = gen_init_phy; |
| 809 | phy[i].is_phy_connected = gen_is_phy_connected; |
| 810 | phy[i].get_link_speed = gen_get_link_speed; |
| 811 | phy[i].auto_negotiate = gen_auto_negotiate; |
Ben Warren | 4c28e27 | 2009-04-27 23:19:10 -0700 | [diff] [blame] | 812 | |
Ilya Yanok | 57c449d | 2011-11-01 13:15:55 +0000 | [diff] [blame] | 813 | debug("Ethernet PHY: %s\n", phy[i].name); |
Ben Warren | 4c28e27 | 2009-04-27 23:19:10 -0700 | [diff] [blame] | 814 | |
Joe Hershberger | 1fbcbed | 2016-08-08 11:28:38 -0500 | [diff] [blame] | 815 | int retval; |
| 816 | struct mii_dev *mdiodev = mdio_alloc(); |
| 817 | if (!mdiodev) |
| 818 | return -ENOMEM; |
| 819 | strncpy(mdiodev->name, phy[i].name, MDIO_NAME_LEN); |
| 820 | mdiodev->read = davinci_mii_phy_read; |
| 821 | mdiodev->write = davinci_mii_phy_write; |
| 822 | |
| 823 | retval = mdio_register(mdiodev); |
| 824 | if (retval < 0) |
| 825 | return retval; |
Tom Rini | c3cf899 | 2017-05-10 12:01:02 -0400 | [diff] [blame] | 826 | #ifdef DAVINCI_EMAC_GIG_ENABLE |
| 827 | #define PHY_CONF_REG 22 |
| 828 | /* Enable PHY to clock out TX_CLK */ |
| 829 | davinci_eth_phy_read(active_phy_addr[i], PHY_CONF_REG, &tmp); |
| 830 | tmp |= PHY_CONF_TXCLKEN; |
| 831 | davinci_eth_phy_write(active_phy_addr[i], PHY_CONF_REG, tmp); |
| 832 | davinci_eth_phy_read(active_phy_addr[i], PHY_CONF_REG, &tmp); |
| 833 | #endif |
Manjunath Hadli | 444d8c1 | 2011-10-13 03:40:54 +0000 | [diff] [blame] | 834 | } |
Rajashekhara, Sudhakar | fe3a0d6 | 2012-06-07 00:27:44 +0000 | [diff] [blame] | 835 | |
Tom Rini | c3cf899 | 2017-05-10 12:01:02 -0400 | [diff] [blame] | 836 | #if defined(CONFIG_TI816X) || (defined(CONFIG_DRIVER_TI_EMAC_USE_RMII) && \ |
Bastian Ruppert | ef2746a | 2012-09-13 22:29:03 +0000 | [diff] [blame] | 837 | defined(CONFIG_MACH_DAVINCI_DA850_EVM) && \ |
Tom Rini | c3cf899 | 2017-05-10 12:01:02 -0400 | [diff] [blame] | 838 | !defined(CONFIG_DRIVER_TI_EMAC_RMII_NO_NEGOTIATE)) |
Rajashekhara, Sudhakar | fe3a0d6 | 2012-06-07 00:27:44 +0000 | [diff] [blame] | 839 | for (i = 0; i < num_phy; i++) { |
| 840 | if (phy[i].is_phy_connected(i)) |
| 841 | phy[i].auto_negotiate(i); |
| 842 | } |
| 843 | #endif |
Bartosz Golaszewski | 2cedf75 | 2019-07-24 10:12:07 +0200 | [diff] [blame] | 844 | return 0; |
Ben Warren | 4c28e27 | 2009-04-27 23:19:10 -0700 | [diff] [blame] | 845 | } |
Bartosz Golaszewski | 2cedf75 | 2019-07-24 10:12:07 +0200 | [diff] [blame] | 846 | |
| 847 | static const struct eth_ops davinci_emac_ops = { |
| 848 | .start = davinci_emac_start, |
| 849 | .send = davinci_emac_send, |
| 850 | .recv = davinci_emac_recv, |
| 851 | .stop = davinci_emac_stop, |
| 852 | .write_hwaddr = davinci_emac_write_hwaddr, |
| 853 | }; |
| 854 | |
| 855 | static const struct udevice_id davinci_emac_ids[] = { |
| 856 | { .compatible = "ti,davinci-dm6467-emac" }, |
| 857 | { .compatible = "ti,am3517-emac", }, |
| 858 | { .compatible = "ti,dm816-emac", }, |
| 859 | { } |
| 860 | }; |
| 861 | |
| 862 | U_BOOT_DRIVER(davinci_emac) = { |
| 863 | .name = "davinci_emac", |
| 864 | .id = UCLASS_ETH, |
| 865 | .of_match = davinci_emac_ids, |
| 866 | .probe = davinci_emac_probe, |
| 867 | .ops = &davinci_emac_ops, |
| 868 | .platdata_auto_alloc_size = sizeof(struct eth_pdata), |
| 869 | }; |