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Chandan Nath7d744102011-10-14 02:58:26 +00001/*
2 * am335x_evm.h
3 *
4 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11 * kind, whether express or implied; without even the implied warranty
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#ifndef __CONFIG_AM335X_EVM_H
17#define __CONFIG_AM335X_EVM_H
18
Chandan Nath68e382b2012-01-09 20:38:55 +000019#define CONFIG_AM33XX
Chandan Nath7d744102011-10-14 02:58:26 +000020
21#include <asm/arch/cpu.h>
22#include <asm/arch/hardware.h>
23
Chandan Nath5b9896d2012-07-24 12:22:20 +000024#define CONFIG_DMA_COHERENT
25#define CONFIG_DMA_COHERENT_SIZE (1 << 20)
26
Tom Rini142184e2012-06-12 14:54:32 -070027#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
28#define CONFIG_SYS_MALLOC_LEN (1024 << 10)
29#define CONFIG_SYS_LONGHELP /* undef to save memory */
30#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
Chandan Nath5c668742012-01-09 20:38:57 +000031#define CONFIG_SYS_PROMPT "U-Boot# "
Chandan Nath7d744102011-10-14 02:58:26 +000032#define CONFIG_SYS_NO_FLASH
Tom Rini077a6a62011-10-21 12:23:06 +000033#define MACH_TYPE_TIAM335EVM 3589 /* Until the next sync */
Chandan Nath7d744102011-10-14 02:58:26 +000034#define CONFIG_MACH_TYPE MACH_TYPE_TIAM335EVM
35
Tom Rini142184e2012-06-12 14:54:32 -070036#define CONFIG_OF_LIBFDT
37#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
38#define CONFIG_SETUP_MEMORY_TAGS
39#define CONFIG_INITRD_TAG
40
41/* commands to include */
42#include <config_cmd_default.h>
43
Chandan Nath7d744102011-10-14 02:58:26 +000044#define CONFIG_CMD_ASKENV
45#define CONFIG_VERSION_VARIABLE
46
47/* set to negative value for no autoboot */
48#define CONFIG_BOOTDELAY 3
Chandan Nath7d744102011-10-14 02:58:26 +000049#define CONFIG_EXTRA_ENV_SETTINGS \
Tom Rini142184e2012-06-12 14:54:32 -070050 "loadaddr=0x80200000\0" \
51 "fdtaddr=0x80F80000\0" \
52 "rdaddr=0x81000000\0" \
53 "bootfile=/boot/uImage\0" \
54 "console=ttyO0,115200n8\0" \
55 "optargs=\0" \
56 "mmcdev=0\0" \
57 "mmcroot=/dev/mmcblk0p2 rw\0" \
58 "mmcrootfstype=ext4 rootwait\0" \
59 "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \
60 "ramrootfstype=ext2\0" \
61 "mmcargs=setenv bootargs console=${console} " \
62 "${optargs} " \
63 "root=${mmcroot} " \
64 "rootfstype=${mmcrootfstype}\0" \
65 "bootenv=uEnv.txt\0" \
66 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
67 "importbootenv=echo Importing environment from mmc ...; " \
68 "env import -t $loadaddr $filesize\0" \
69 "ramargs=setenv bootargs console=${console} " \
70 "${optargs} " \
71 "root=${ramroot} " \
72 "rootfstype=${ramrootfstype}\0" \
73 "loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \
74 "loaduimagefat=fatload mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \
75 "loaduimage=ext2load mmc ${mmcdev}:2 ${loadaddr} ${bootfile}\0" \
76 "mmcboot=echo Booting from mmc ...; " \
77 "run mmcargs; " \
78 "bootm ${loadaddr}\0" \
79 "ramboot=echo Booting from ramdisk ...; " \
80 "run ramargs; " \
81 "bootm ${loadaddr}\0" \
82
83#define CONFIG_BOOTCOMMAND \
84 "if mmc rescan ${mmcdev}; then " \
85 "echo SD/MMC found on device ${mmcdev};" \
86 "if run loadbootenv; then " \
87 "echo Loaded environment from ${bootenv};" \
88 "run importbootenv;" \
89 "fi;" \
90 "if test -n $uenvcmd; then " \
91 "echo Running uenvcmd ...;" \
92 "run uenvcmd;" \
93 "fi;" \
94 "if run loaduimage; then " \
95 "run mmcboot;" \
96 "fi;" \
97 "fi;" \
Chandan Nath7d744102011-10-14 02:58:26 +000098
99/* Clock Defines */
100#define V_OSCK 24000000 /* Clock output from T2 */
Chandan Nath5c668742012-01-09 20:38:57 +0000101#define V_SCLK (V_OSCK)
Chandan Nath7d744102011-10-14 02:58:26 +0000102
Chandan Nath7d744102011-10-14 02:58:26 +0000103#define CONFIG_CMD_ECHO
104
105/* max number of command args */
Chandan Nath5c668742012-01-09 20:38:57 +0000106#define CONFIG_SYS_MAXARGS 16
Chandan Nath7d744102011-10-14 02:58:26 +0000107
108/* Console I/O Buffer Size */
109#define CONFIG_SYS_CBSIZE 512
110
111/* Print Buffer Size */
112#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
113 + sizeof(CONFIG_SYS_PROMPT) + 16)
114
115/* Boot Argument Buffer Size */
116#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
117
118/*
119 * memtest works on 8 MB in DRAM after skipping 32MB from
120 * start addr of ram disk
121 */
122#define CONFIG_SYS_MEMTEST_START (PHYS_DRAM_1 + (64 * 1024 * 1024))
123#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START \
124 + (8 * 1024 * 1024))
125
Chandan Nath7d744102011-10-14 02:58:26 +0000126#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */
127#define CONFIG_SYS_HZ 1000 /* 1ms clock */
128
Chandan Nathd6e97f82012-01-09 20:38:58 +0000129#define CONFIG_MMC
130#define CONFIG_GENERIC_MMC
131#define CONFIG_OMAP_HSMMC
132#define CONFIG_CMD_MMC
133#define CONFIG_DOS_PARTITION
134#define CONFIG_CMD_FAT
135#define CONFIG_CMD_EXT2
136
Chandan Nath7d744102011-10-14 02:58:26 +0000137 /* Physical Memory Map */
138#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
139#define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */
Chandan Nath7d744102011-10-14 02:58:26 +0000140#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
141
142#define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1
143#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
144 GENERATED_GBL_DATA_SIZE)
145 /* Platform/Board specific defs */
Chandan Nath7d744102011-10-14 02:58:26 +0000146#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
147#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
148#define CONFIG_SYS_HZ 1000
149
150/* NS16550 Configuration */
151#define CONFIG_SYS_NS16550
152#define CONFIG_SYS_NS16550_SERIAL
153#define CONFIG_SYS_NS16550_REG_SIZE (-4)
154#define CONFIG_SYS_NS16550_CLK (48000000)
155#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
Chandan Nath7d744102011-10-14 02:58:26 +0000156
Patil, Rachna5f70c512012-01-22 23:47:01 +0000157/* I2C Configuration */
158#define CONFIG_I2C
159#define CONFIG_CMD_I2C
160#define CONFIG_HARD_I2C
161#define CONFIG_SYS_I2C_SPEED 100000
162#define CONFIG_SYS_I2C_SLAVE 1
Steve Sakoman695b1fe2012-06-22 07:45:57 +0000163#define CONFIG_I2C_MULTI_BUS
Patil, Rachna5f70c512012-01-22 23:47:01 +0000164#define CONFIG_DRIVER_OMAP24XX_I2C
Tom Rini132b6db2012-07-31 09:37:08 -0700165#define CONFIG_CMD_EEPROM
166#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
167#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
168#define CONFIG_SYS_I2C_MULTI_EEPROMS
Patil, Rachna5f70c512012-01-22 23:47:01 +0000169
Chandan Nath7d744102011-10-14 02:58:26 +0000170#define CONFIG_BAUDRATE 115200
171#define CONFIG_SYS_BAUDRATE_TABLE { 110, 300, 600, 1200, 2400, \
1724800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200 }
173
174/*
175 * select serial console configuration
176 */
177#define CONFIG_SERIAL1 1
178#define CONFIG_CONS_INDEX 1
179#define CONFIG_SYS_CONSOLE_INFO_QUIET
180
181#define CONFIG_ENV_IS_NOWHERE
182
Chandan Nath77a73fe2012-01-09 20:38:59 +0000183/* Defines for SPL */
184#define CONFIG_SPL
185#define CONFIG_SPL_TEXT_BASE 0x402F0400
186#define CONFIG_SPL_MAX_SIZE (46 * 1024)
187#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
188
189#define CONFIG_SPL_BSS_START_ADDR 0x80000000
190#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
191
192#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
193#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
194#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
195#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
196#define CONFIG_SPL_MMC_SUPPORT
197#define CONFIG_SPL_FAT_SUPPORT
Patil, Rachna5f70c512012-01-22 23:47:01 +0000198#define CONFIG_SPL_I2C_SUPPORT
Chandan Nath77a73fe2012-01-09 20:38:59 +0000199
200#define CONFIG_SPL_LIBCOMMON_SUPPORT
201#define CONFIG_SPL_LIBDISK_SUPPORT
202#define CONFIG_SPL_LIBGENERIC_SUPPORT
203#define CONFIG_SPL_SERIAL_SUPPORT
Marek Vasutff0ebb82012-07-21 05:02:27 +0000204#define CONFIG_SPL_GPIO_SUPPORT
Matt Portere3283762012-01-31 12:03:58 +0000205#define CONFIG_SPL_YMODEM_SUPPORT
Chandan Nath77a73fe2012-01-09 20:38:59 +0000206#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
207
208/*
209 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
210 * 64 bytes before this address should be set aside for u-boot.img's
211 * header. That is 0x800FFFC0--0x80100000 should not be used for any
212 * other needs.
213 */
214#define CONFIG_SYS_TEXT_BASE 0x80800000
215#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
216#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
217
218/* Since SPL did pll and ddr initialization for us,
219 * we don't need to do it twice.
220 */
221#ifndef CONFIG_SPL_BUILD
222#define CONFIG_SKIP_LOWLEVEL_INIT
223#endif
Chandan Nath7d744102011-10-14 02:58:26 +0000224
225/* Unsupported features */
226#undef CONFIG_USE_IRQ
227
Chandan Nath5b9896d2012-07-24 12:22:20 +0000228#define CONFIG_CMD_NET
229#define CONFIG_CMD_DHCP
230#define CONFIG_CMD_PING
231#define CONFIG_DRIVER_TI_CPSW
232#define CONFIG_MII
233#define CONFIG_BOOTP_DEFAULT
234#define CONFIG_BOOTP_DNS
235#define CONFIG_BOOTP_DNS2
236#define CONFIG_BOOTP_SEND_HOSTNAME
237#define CONFIG_BOOTP_GATEWAY
238#define CONFIG_BOOTP_SUBNETMASK
239#define CONFIG_NET_RETRY_COUNT 10
240#define CONFIG_NET_MULTI
241#define CONFIG_PHY_GIGE
242#define CONFIG_PHYLIB
243
Chandan Nath7d744102011-10-14 02:58:26 +0000244#endif /* ! __CONFIG_AM335X_EVM_H */