blob: aa4aa83e05f1753d3e621d374b13459c660aa27c [file] [log] [blame]
Patrick Delaunay48c5e902020-03-06 17:54:41 +01001// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2/*
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
4 * Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
5 */
6
7#include <dt-bindings/gpio/gpio.h>
8#include <dt-bindings/mfd/st,stpmic1.h>
9
10/ {
11 memory@c0000000 {
12 device_type = "memory";
13 reg = <0xc0000000 0x20000000>;
14 };
15
16 reserved-memory {
17 #address-cells = <1>;
18 #size-cells = <1>;
19 ranges;
20
21 mcuram2: mcuram2@10000000 {
22 compatible = "shared-dma-pool";
23 reg = <0x10000000 0x40000>;
24 no-map;
25 };
26
27 vdev0vring0: vdev0vring0@10040000 {
28 compatible = "shared-dma-pool";
29 reg = <0x10040000 0x1000>;
30 no-map;
31 };
32
33 vdev0vring1: vdev0vring1@10041000 {
34 compatible = "shared-dma-pool";
35 reg = <0x10041000 0x1000>;
36 no-map;
37 };
38
39 vdev0buffer: vdev0buffer@10042000 {
40 compatible = "shared-dma-pool";
41 reg = <0x10042000 0x4000>;
42 no-map;
43 };
44
45 mcuram: mcuram@30000000 {
46 compatible = "shared-dma-pool";
47 reg = <0x30000000 0x40000>;
48 no-map;
49 };
50
51 retram: retram@38000000 {
52 compatible = "shared-dma-pool";
53 reg = <0x38000000 0x10000>;
54 no-map;
55 };
56
57 gpu_reserved: gpu@d4000000 {
58 reg = <0xd4000000 0x4000000>;
59 no-map;
60 };
Patrick Delaunay48c5e902020-03-06 17:54:41 +010061 };
62
63 led {
64 compatible = "gpio-leds";
Patrick Delaunay551efca2020-09-16 10:01:32 +020065 led-blue {
Patrick Delaunay48c5e902020-03-06 17:54:41 +010066 label = "heartbeat";
67 gpios = <&gpiod 11 GPIO_ACTIVE_HIGH>;
68 linux,default-trigger = "heartbeat";
69 default-state = "off";
70 };
71 };
72
73 sound {
74 compatible = "audio-graph-card";
75 label = "STM32MP1-DK";
76 routing =
77 "Playback" , "MCLK",
78 "Capture" , "MCLK",
79 "MICL" , "Mic Bias";
80 dais = <&sai2a_port &sai2b_port &i2s2_port>;
81 status = "okay";
82 };
83};
84
85&adc {
86 pinctrl-names = "default";
87 pinctrl-0 = <&adc12_ain_pins_a>, <&adc12_usb_cc_pins_a>;
88 vdd-supply = <&vdd>;
89 vdda-supply = <&vdd>;
90 vref-supply = <&vrefbuf>;
91 status = "disabled";
92 adc1: adc@0 {
93 /*
94 * Type-C USB_PWR_CC1 & USB_PWR_CC2 on in18 & in19.
95 * Use at least 5 * RC time, e.g. 5 * (Rp + Rd) * C:
96 * 5 * (56 + 47kOhms) * 5pF => 2.5us.
97 * Use arbitrary margin here (e.g. 5us).
98 */
99 st,min-sample-time-nsecs = <5000>;
100 /* AIN connector, USB Type-C CC1 & CC2 */
101 st,adc-channels = <0 1 6 13 18 19>;
102 status = "okay";
103 };
104 adc2: adc@100 {
105 /* AIN connector, USB Type-C CC1 & CC2 */
106 st,adc-channels = <0 1 2 6 18 19>;
107 st,min-sample-time-nsecs = <5000>;
108 status = "okay";
109 };
110};
111
112&cec {
113 pinctrl-names = "default", "sleep";
114 pinctrl-0 = <&cec_pins_b>;
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200115 pinctrl-1 = <&cec_sleep_pins_b>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100116 status = "okay";
117};
118
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200119&dts {
120 status = "okay";
121};
122
Patrick Delaunay0e20c1f2020-05-25 12:19:42 +0200123&cpu0{
124 cpu-supply = <&vddcore>;
125};
126
127&cpu1{
128 cpu-supply = <&vddcore>;
129};
130
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100131&ethernet0 {
132 status = "okay";
133 pinctrl-0 = <&ethernet0_rgmii_pins_a>;
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200134 pinctrl-1 = <&ethernet0_rgmii_sleep_pins_a>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100135 pinctrl-names = "default", "sleep";
136 phy-mode = "rgmii-id";
137 max-speed = <1000>;
138 phy-handle = <&phy0>;
139
140 mdio0 {
141 #address-cells = <1>;
142 #size-cells = <0>;
143 compatible = "snps,dwmac-mdio";
144 phy0: ethernet-phy@0 {
145 reg = <0>;
146 };
147 };
148};
149
150&gpu {
151 contiguous-area = <&gpu_reserved>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100152};
153
154&i2c1 {
155 pinctrl-names = "default", "sleep";
156 pinctrl-0 = <&i2c1_pins_a>;
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200157 pinctrl-1 = <&i2c1_sleep_pins_a>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100158 i2c-scl-rising-time-ns = <100>;
159 i2c-scl-falling-time-ns = <7>;
160 status = "okay";
161 /delete-property/dmas;
162 /delete-property/dma-names;
163
164 hdmi-transmitter@39 {
165 compatible = "sil,sii9022";
166 reg = <0x39>;
167 iovcc-supply = <&v3v3_hdmi>;
168 cvcc12-supply = <&v1v2_hdmi>;
169 reset-gpios = <&gpioa 10 GPIO_ACTIVE_LOW>;
170 interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
171 interrupt-parent = <&gpiog>;
172 #sound-dai-cells = <0>;
173 status = "okay";
174
175 ports {
176 #address-cells = <1>;
177 #size-cells = <0>;
178
179 port@0 {
180 reg = <0>;
181 sii9022_in: endpoint {
182 remote-endpoint = <&ltdc_ep0_out>;
183 };
184 };
185
186 port@3 {
187 reg = <3>;
188 sii9022_tx_endpoint: endpoint {
189 remote-endpoint = <&i2s2_endpoint>;
190 };
191 };
192 };
193 };
194
195 cs42l51: cs42l51@4a {
196 compatible = "cirrus,cs42l51";
197 reg = <0x4a>;
198 #sound-dai-cells = <0>;
199 VL-supply = <&v3v3>;
200 VD-supply = <&v1v8_audio>;
201 VA-supply = <&v1v8_audio>;
202 VAHP-supply = <&v1v8_audio>;
203 reset-gpios = <&gpiog 9 GPIO_ACTIVE_LOW>;
204 clocks = <&sai2a>;
205 clock-names = "MCLK";
206 status = "okay";
207
208 cs42l51_port: port {
209 #address-cells = <1>;
210 #size-cells = <0>;
211
212 cs42l51_tx_endpoint: endpoint@0 {
213 reg = <0>;
214 remote-endpoint = <&sai2a_endpoint>;
215 frame-master;
216 bitclock-master;
217 };
218
219 cs42l51_rx_endpoint: endpoint@1 {
220 reg = <1>;
221 remote-endpoint = <&sai2b_endpoint>;
222 frame-master;
223 bitclock-master;
224 };
225 };
226 };
227};
228
229&i2c4 {
Patrick Delaunaydf0d20a2020-04-30 15:52:46 +0200230 pinctrl-names = "default", "sleep";
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100231 pinctrl-0 = <&i2c4_pins_a>;
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200232 pinctrl-1 = <&i2c4_sleep_pins_a>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100233 i2c-scl-rising-time-ns = <185>;
234 i2c-scl-falling-time-ns = <20>;
Patrick Delaunaydf0d20a2020-04-30 15:52:46 +0200235 clock-frequency = <400000>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100236 status = "okay";
237 /* spare dmas for other usage */
238 /delete-property/dmas;
239 /delete-property/dma-names;
240
241 typec: stusb1600@28 {
242 compatible = "st,stusb1600";
243 reg = <0x28>;
244 interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
245 interrupt-parent = <&gpioi>;
246 pinctrl-names = "default";
247 pinctrl-0 = <&stusb1600_pins_a>;
248
249 status = "okay";
250
251 typec_con: connector {
252 compatible = "usb-c-connector";
253 label = "USB-C";
254 power-role = "sink";
255 power-opmode = "default";
256 };
257 };
258
259 pmic: stpmic@33 {
260 compatible = "st,stpmic1";
261 reg = <0x33>;
262 interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
263 interrupt-controller;
264 #interrupt-cells = <2>;
265 status = "okay";
266
267 regulators {
268 compatible = "st,stpmic1-regulators";
269 ldo1-supply = <&v3v3>;
270 ldo3-supply = <&vdd_ddr>;
271 ldo6-supply = <&v3v3>;
272 pwr_sw1-supply = <&bst_out>;
273 pwr_sw2-supply = <&bst_out>;
274
275 vddcore: buck1 {
276 regulator-name = "vddcore";
277 regulator-min-microvolt = <1200000>;
278 regulator-max-microvolt = <1350000>;
279 regulator-always-on;
280 regulator-initial-mode = <0>;
281 regulator-over-current-protection;
282 };
283
284 vdd_ddr: buck2 {
285 regulator-name = "vdd_ddr";
286 regulator-min-microvolt = <1350000>;
287 regulator-max-microvolt = <1350000>;
288 regulator-always-on;
289 regulator-initial-mode = <0>;
290 regulator-over-current-protection;
291 };
292
293 vdd: buck3 {
294 regulator-name = "vdd";
295 regulator-min-microvolt = <3300000>;
296 regulator-max-microvolt = <3300000>;
297 regulator-always-on;
298 st,mask-reset;
299 regulator-initial-mode = <0>;
300 regulator-over-current-protection;
301 };
302
303 v3v3: buck4 {
304 regulator-name = "v3v3";
305 regulator-min-microvolt = <3300000>;
306 regulator-max-microvolt = <3300000>;
307 regulator-always-on;
308 regulator-over-current-protection;
309 regulator-initial-mode = <0>;
310 };
311
312 v1v8_audio: ldo1 {
313 regulator-name = "v1v8_audio";
314 regulator-min-microvolt = <1800000>;
315 regulator-max-microvolt = <1800000>;
316 regulator-always-on;
317 interrupts = <IT_CURLIM_LDO1 0>;
318 };
319
320 v3v3_hdmi: ldo2 {
321 regulator-name = "v3v3_hdmi";
322 regulator-min-microvolt = <3300000>;
323 regulator-max-microvolt = <3300000>;
324 regulator-always-on;
325 interrupts = <IT_CURLIM_LDO2 0>;
326 };
327
328 vtt_ddr: ldo3 {
329 regulator-name = "vtt_ddr";
330 regulator-min-microvolt = <500000>;
331 regulator-max-microvolt = <750000>;
332 regulator-always-on;
333 regulator-over-current-protection;
334 };
335
336 vdd_usb: ldo4 {
337 regulator-name = "vdd_usb";
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100338 interrupts = <IT_CURLIM_LDO4 0>;
339 };
340
341 vdda: ldo5 {
342 regulator-name = "vdda";
343 regulator-min-microvolt = <2900000>;
344 regulator-max-microvolt = <2900000>;
345 interrupts = <IT_CURLIM_LDO5 0>;
346 regulator-boot-on;
347 };
348
349 v1v2_hdmi: ldo6 {
350 regulator-name = "v1v2_hdmi";
351 regulator-min-microvolt = <1200000>;
352 regulator-max-microvolt = <1200000>;
353 regulator-always-on;
354 interrupts = <IT_CURLIM_LDO6 0>;
355 };
356
357 vref_ddr: vref_ddr {
358 regulator-name = "vref_ddr";
359 regulator-always-on;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100360 };
361
362 bst_out: boost {
363 regulator-name = "bst_out";
364 interrupts = <IT_OCP_BOOST 0>;
365 };
366
367 vbus_otg: pwr_sw1 {
368 regulator-name = "vbus_otg";
369 interrupts = <IT_OCP_OTG 0>;
370 };
371
372 vbus_sw: pwr_sw2 {
373 regulator-name = "vbus_sw";
374 interrupts = <IT_OCP_SWOUT 0>;
375 regulator-active-discharge = <1>;
376 };
377 };
378
379 onkey {
380 compatible = "st,stpmic1-onkey";
381 interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>;
382 interrupt-names = "onkey-falling", "onkey-rising";
383 power-off-time-sec = <10>;
384 status = "okay";
385 };
386
387 watchdog {
388 compatible = "st,stpmic1-wdt";
389 status = "disabled";
390 };
391 };
392};
393
Patrick Delaunay551efca2020-09-16 10:01:32 +0200394&i2c5 {
395 pinctrl-names = "default", "sleep";
396 pinctrl-0 = <&i2c5_pins_a>;
397 pinctrl-1 = <&i2c5_sleep_pins_a>;
398 i2c-scl-rising-time-ns = <185>;
399 i2c-scl-falling-time-ns = <20>;
400 clock-frequency = <400000>;
401 /* spare dmas for other usage */
402 /delete-property/dmas;
403 /delete-property/dma-names;
404 status = "disabled";
405};
406
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100407&i2s2 {
408 clocks = <&rcc SPI2>, <&rcc SPI2_K>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
409 clock-names = "pclk", "i2sclk", "x8k", "x11k";
410 pinctrl-names = "default", "sleep";
411 pinctrl-0 = <&i2s2_pins_a>;
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200412 pinctrl-1 = <&i2s2_sleep_pins_a>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100413 status = "okay";
414
415 i2s2_port: port {
416 i2s2_endpoint: endpoint {
417 remote-endpoint = <&sii9022_tx_endpoint>;
418 format = "i2s";
419 mclk-fs = <256>;
420 };
421 };
422};
423
424&ipcc {
425 status = "okay";
426};
427
428&iwdg2 {
429 timeout-sec = <32>;
430 status = "okay";
431};
432
433&ltdc {
434 pinctrl-names = "default", "sleep";
435 pinctrl-0 = <&ltdc_pins_a>;
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200436 pinctrl-1 = <&ltdc_sleep_pins_a>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100437 status = "okay";
438
439 port {
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100440 ltdc_ep0_out: endpoint@0 {
441 reg = <0>;
442 remote-endpoint = <&sii9022_in>;
443 };
444 };
445};
446
447&m4_rproc {
448 memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
449 <&vdev0vring1>, <&vdev0buffer>;
450 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
451 mbox-names = "vq0", "vq1", "shutdown";
452 interrupt-parent = <&exti>;
453 interrupts = <68 1>;
454 status = "okay";
455};
456
457&pwr_regulators {
458 vdd-supply = <&vdd>;
459 vdd_3v3_usbfs-supply = <&vdd_usb>;
460};
461
462&rng1 {
463 status = "okay";
464};
465
466&rtc {
467 status = "okay";
468};
469
470&sai2 {
471 clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
472 clock-names = "pclk", "x8k", "x11k";
473 pinctrl-names = "default", "sleep";
474 pinctrl-0 = <&sai2a_pins_a>, <&sai2b_pins_b>;
475 pinctrl-1 = <&sai2a_sleep_pins_a>, <&sai2b_sleep_pins_b>;
476 status = "okay";
477
478 sai2a: audio-controller@4400b004 {
479 #clock-cells = <0>;
480 dma-names = "tx";
481 clocks = <&rcc SAI2_K>;
482 clock-names = "sai_ck";
483 status = "okay";
484
485 sai2a_port: port {
486 sai2a_endpoint: endpoint {
487 remote-endpoint = <&cs42l51_tx_endpoint>;
488 format = "i2s";
489 mclk-fs = <256>;
490 dai-tdm-slot-num = <2>;
491 dai-tdm-slot-width = <32>;
492 };
493 };
494 };
495
496 sai2b: audio-controller@4400b024 {
497 dma-names = "rx";
498 st,sync = <&sai2a 2>;
499 clocks = <&rcc SAI2_K>, <&sai2a>;
500 clock-names = "sai_ck", "MCLK";
501 status = "okay";
502
503 sai2b_port: port {
504 sai2b_endpoint: endpoint {
505 remote-endpoint = <&cs42l51_rx_endpoint>;
506 format = "i2s";
507 mclk-fs = <256>;
508 dai-tdm-slot-num = <2>;
509 dai-tdm-slot-width = <32>;
510 };
511 };
512 };
513};
514
515&sdmmc1 {
516 pinctrl-names = "default", "opendrain", "sleep";
517 pinctrl-0 = <&sdmmc1_b4_pins_a>;
518 pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
519 pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
Patrick Delaunaydf0d20a2020-04-30 15:52:46 +0200520 cd-gpios = <&gpiob 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
521 disable-wp;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100522 st,neg-edge;
523 bus-width = <4>;
524 vmmc-supply = <&v3v3>;
525 status = "okay";
526};
527
528&sdmmc3 {
529 pinctrl-names = "default", "opendrain", "sleep";
530 pinctrl-0 = <&sdmmc3_b4_pins_a>;
531 pinctrl-1 = <&sdmmc3_b4_od_pins_a>;
532 pinctrl-2 = <&sdmmc3_b4_sleep_pins_a>;
533 broken-cd;
534 st,neg-edge;
535 bus-width = <4>;
536 vmmc-supply = <&v3v3>;
537 status = "disabled";
538};
539
540&timers1 {
541 /* spare dmas for other usage */
542 /delete-property/dmas;
543 /delete-property/dma-names;
544 status = "disabled";
545 pwm {
546 pinctrl-0 = <&pwm1_pins_a>;
547 pinctrl-1 = <&pwm1_sleep_pins_a>;
548 pinctrl-names = "default", "sleep";
549 status = "okay";
550 };
551 timer@0 {
552 status = "okay";
553 };
554};
555
556&timers3 {
557 /delete-property/dmas;
558 /delete-property/dma-names;
559 status = "disabled";
560 pwm {
561 pinctrl-0 = <&pwm3_pins_a>;
562 pinctrl-1 = <&pwm3_sleep_pins_a>;
563 pinctrl-names = "default", "sleep";
564 status = "okay";
565 };
566 timer@2 {
567 status = "okay";
568 };
569};
570
571&timers4 {
572 /delete-property/dmas;
573 /delete-property/dma-names;
574 status = "disabled";
575 pwm {
576 pinctrl-0 = <&pwm4_pins_a &pwm4_pins_b>;
577 pinctrl-1 = <&pwm4_sleep_pins_a &pwm4_sleep_pins_b>;
578 pinctrl-names = "default", "sleep";
579 status = "okay";
580 };
581 timer@3 {
582 status = "okay";
583 };
584};
585
586&timers5 {
587 /delete-property/dmas;
588 /delete-property/dma-names;
589 status = "disabled";
590 pwm {
591 pinctrl-0 = <&pwm5_pins_a>;
592 pinctrl-1 = <&pwm5_sleep_pins_a>;
593 pinctrl-names = "default", "sleep";
594 status = "okay";
595 };
596 timer@4 {
597 status = "okay";
598 };
599};
600
601&timers6 {
602 /delete-property/dmas;
603 /delete-property/dma-names;
604 status = "disabled";
605 timer@5 {
606 status = "okay";
607 };
608};
609
610&timers12 {
611 /delete-property/dmas;
612 /delete-property/dma-names;
613 status = "disabled";
614 pwm {
615 pinctrl-0 = <&pwm12_pins_a>;
616 pinctrl-1 = <&pwm12_sleep_pins_a>;
617 pinctrl-names = "default", "sleep";
618 status = "okay";
619 };
620 timer@11 {
621 status = "okay";
622 };
623};
624
625&uart4 {
Patrick Delaunay551efca2020-09-16 10:01:32 +0200626 pinctrl-names = "default", "sleep", "idle";
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100627 pinctrl-0 = <&uart4_pins_a>;
Patrick Delaunay551efca2020-09-16 10:01:32 +0200628 pinctrl-1 = <&uart4_sleep_pins_a>;
629 pinctrl-2 = <&uart4_idle_pins_a>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100630 status = "okay";
631};
632
Patrick Delaunay551efca2020-09-16 10:01:32 +0200633&uart7 {
634 pinctrl-names = "default", "sleep", "idle";
635 pinctrl-0 = <&uart7_pins_c>;
636 pinctrl-1 = <&uart7_sleep_pins_c>;
637 pinctrl-2 = <&uart7_idle_pins_c>;
638 status = "disabled";
639};
640
641&usart3 {
642 pinctrl-names = "default", "sleep", "idle";
643 pinctrl-0 = <&usart3_pins_c>;
644 pinctrl-1 = <&usart3_sleep_pins_c>;
645 pinctrl-2 = <&usart3_idle_pins_c>;
646 uart-has-rtscts;
647 status = "disabled";
648};
649
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100650&usbh_ehci {
651 phys = <&usbphyc_port0>;
652 status = "okay";
653};
654
655&usbotg_hs {
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100656 phys = <&usbphyc_port1 0>;
657 phy-names = "usb2-phy";
Patrick Delaunay551efca2020-09-16 10:01:32 +0200658 usb-role-switch;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100659 status = "okay";
660};
661
662&usbphyc {
663 status = "okay";
664};
665
666&usbphyc_port0 {
667 phy-supply = <&vdd_usb>;
668};
669
670&usbphyc_port1 {
671 phy-supply = <&vdd_usb>;
672};
673
674&vrefbuf {
675 regulator-min-microvolt = <2500000>;
676 regulator-max-microvolt = <2500000>;
677 vdda-supply = <&vdd>;
678 status = "okay";
679};