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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Simon Glass36ad2342015-06-23 15:39:15 -06002/*
3 * Copyright (C) 2015 Google, Inc
4 * Written by Simon Glass <sjg@chromium.org>
Stephen Warrena9622432016-06-17 09:44:00 -06005 * Copyright (c) 2016, NVIDIA CORPORATION.
Philipp Tomsich9cf03b02018-01-08 13:59:18 +01006 * Copyright (c) 2018, Theobroma Systems Design und Consulting GmbH
Simon Glass36ad2342015-06-23 15:39:15 -06007 */
8
9#include <common.h>
10#include <clk.h>
Stephen Warrena9622432016-06-17 09:44:00 -060011#include <clk-uclass.h>
Simon Glass36ad2342015-06-23 15:39:15 -060012#include <dm.h>
Philipp Tomsich9cf03b02018-01-08 13:59:18 +010013#include <dm/read.h>
Simon Glass589d9152016-07-04 11:58:03 -060014#include <dt-structs.h>
Simon Glass36ad2342015-06-23 15:39:15 -060015#include <errno.h>
Lukasz Majewski9e38dc32019-06-24 15:50:42 +020016#include <linux/clk-provider.h>
Simon Glass36ad2342015-06-23 15:39:15 -060017
Mario Six799fe562018-01-15 11:06:51 +010018static inline const struct clk_ops *clk_dev_ops(struct udevice *dev)
Simon Glass36ad2342015-06-23 15:39:15 -060019{
Mario Six799fe562018-01-15 11:06:51 +010020 return (const struct clk_ops *)dev->driver->ops;
Simon Glass36ad2342015-06-23 15:39:15 -060021}
22
Stephen Warrena9622432016-06-17 09:44:00 -060023#if CONFIG_IS_ENABLED(OF_CONTROL)
Simon Glass589d9152016-07-04 11:58:03 -060024# if CONFIG_IS_ENABLED(OF_PLATDATA)
25int clk_get_by_index_platdata(struct udevice *dev, int index,
Simon Glasse94414b2017-08-29 14:15:56 -060026 struct phandle_1_arg *cells, struct clk *clk)
Simon Glass589d9152016-07-04 11:58:03 -060027{
28 int ret;
29
30 if (index != 0)
31 return -ENOSYS;
32 ret = uclass_get_device(UCLASS_CLK, 0, &clk->dev);
33 if (ret)
34 return ret;
Simon Glassfdec5802017-08-29 14:15:58 -060035 clk->id = cells[0].arg[0];
Simon Glass589d9152016-07-04 11:58:03 -060036
37 return 0;
38}
39# else
Stephen Warrena9622432016-06-17 09:44:00 -060040static int clk_of_xlate_default(struct clk *clk,
Simon Glassb7ae2772017-05-18 20:09:40 -060041 struct ofnode_phandle_args *args)
Simon Glass36ad2342015-06-23 15:39:15 -060042{
Stephen Warrena9622432016-06-17 09:44:00 -060043 debug("%s(clk=%p)\n", __func__, clk);
Simon Glass36ad2342015-06-23 15:39:15 -060044
Stephen Warrena9622432016-06-17 09:44:00 -060045 if (args->args_count > 1) {
46 debug("Invaild args_count: %d\n", args->args_count);
47 return -EINVAL;
48 }
Simon Glass36ad2342015-06-23 15:39:15 -060049
Stephen Warrena9622432016-06-17 09:44:00 -060050 if (args->args_count)
51 clk->id = args->args[0];
52 else
53 clk->id = 0;
Simon Glass36ad2342015-06-23 15:39:15 -060054
Sekhar Nori3d23abd2019-07-11 14:30:24 +053055 clk->data = 0;
56
Stephen Warrena9622432016-06-17 09:44:00 -060057 return 0;
Simon Glass36ad2342015-06-23 15:39:15 -060058}
Simon Glass0342bd22016-01-20 19:43:02 -070059
Jagan Tekifc7c7ce2019-02-28 00:26:52 +053060static int clk_get_by_index_tail(int ret, ofnode node,
61 struct ofnode_phandle_args *args,
62 const char *list_name, int index,
63 struct clk *clk)
64{
65 struct udevice *dev_clk;
66 const struct clk_ops *ops;
67
68 assert(clk);
69 clk->dev = NULL;
70 if (ret)
71 goto err;
72
73 ret = uclass_get_device_by_ofnode(UCLASS_CLK, args->node, &dev_clk);
74 if (ret) {
75 debug("%s: uclass_get_device_by_of_offset failed: err=%d\n",
76 __func__, ret);
77 return ret;
78 }
79
80 clk->dev = dev_clk;
81
82 ops = clk_dev_ops(dev_clk);
83
84 if (ops->of_xlate)
85 ret = ops->of_xlate(clk, args);
86 else
87 ret = clk_of_xlate_default(clk, args);
88 if (ret) {
89 debug("of_xlate() failed: %d\n", ret);
90 return ret;
91 }
92
93 return clk_request(dev_clk, clk);
94err:
95 debug("%s: Node '%s', property '%s', failed to request CLK index %d: %d\n",
96 __func__, ofnode_get_name(node), list_name, index, ret);
97 return ret;
98}
99
Philipp Tomsichf7604342018-01-08 11:18:18 +0100100static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name,
101 int index, struct clk *clk)
Simon Glass0342bd22016-01-20 19:43:02 -0700102{
Simon Glass0342bd22016-01-20 19:43:02 -0700103 int ret;
Simon Glass2558bff2017-05-30 21:47:29 -0600104 struct ofnode_phandle_args args;
Simon Glass0342bd22016-01-20 19:43:02 -0700105
Stephen Warrena9622432016-06-17 09:44:00 -0600106 debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk);
107
108 assert(clk);
Patrice Chotard96fc03d2017-07-18 11:57:07 +0200109 clk->dev = NULL;
110
Philipp Tomsichf7604342018-01-08 11:18:18 +0100111 ret = dev_read_phandle_with_args(dev, prop_name, "#clock-cells", 0,
Mario Six799fe562018-01-15 11:06:51 +0100112 index, &args);
Simon Glass0342bd22016-01-20 19:43:02 -0700113 if (ret) {
114 debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
115 __func__, ret);
116 return ret;
117 }
118
Stephen Warrena9622432016-06-17 09:44:00 -0600119
Jagan Tekia77add32019-02-28 00:26:53 +0530120 return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
121 index > 0, clk);
Stephen Warrena9622432016-06-17 09:44:00 -0600122}
Philipp Tomsichf7604342018-01-08 11:18:18 +0100123
124int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
125{
Jagan Tekifc7c7ce2019-02-28 00:26:52 +0530126 struct ofnode_phandle_args args;
127 int ret;
128
129 ret = dev_read_phandle_with_args(dev, "clocks", "#clock-cells", 0,
130 index, &args);
131
132 return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
133 index > 0, clk);
134}
135
136int clk_get_by_index_nodev(ofnode node, int index, struct clk *clk)
137{
138 struct ofnode_phandle_args args;
139 int ret;
140
141 ret = ofnode_parse_phandle_with_args(node, "clocks", "#clock-cells", 0,
142 index > 0, &args);
143
144 return clk_get_by_index_tail(ret, node, &args, "clocks",
145 index > 0, clk);
Philipp Tomsichf7604342018-01-08 11:18:18 +0100146}
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100147
Neil Armstrong8a275a02018-04-03 11:44:18 +0200148int clk_get_bulk(struct udevice *dev, struct clk_bulk *bulk)
149{
150 int i, ret, err, count;
151
152 bulk->count = 0;
153
154 count = dev_count_phandle_with_args(dev, "clocks", "#clock-cells");
Neil Armstrong52b26d92018-04-17 11:30:31 +0200155 if (count < 1)
156 return count;
Neil Armstrong8a275a02018-04-03 11:44:18 +0200157
158 bulk->clks = devm_kcalloc(dev, count, sizeof(struct clk), GFP_KERNEL);
159 if (!bulk->clks)
160 return -ENOMEM;
161
162 for (i = 0; i < count; i++) {
163 ret = clk_get_by_index(dev, i, &bulk->clks[i]);
164 if (ret < 0)
165 goto bulk_get_err;
166
167 ++bulk->count;
168 }
169
170 return 0;
171
172bulk_get_err:
173 err = clk_release_all(bulk->clks, bulk->count);
174 if (err)
175 debug("%s: could release all clocks for %p\n",
176 __func__, dev);
177
178 return ret;
179}
180
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100181static int clk_set_default_parents(struct udevice *dev)
182{
183 struct clk clk, parent_clk;
184 int index;
185 int num_parents;
186 int ret;
187
188 num_parents = dev_count_phandle_with_args(dev, "assigned-clock-parents",
189 "#clock-cells");
190 if (num_parents < 0) {
191 debug("%s: could not read assigned-clock-parents for %p\n",
192 __func__, dev);
193 return 0;
194 }
195
196 for (index = 0; index < num_parents; index++) {
197 ret = clk_get_by_indexed_prop(dev, "assigned-clock-parents",
198 index, &parent_clk);
Neil Armstrongf3cc6312018-07-26 15:19:32 +0200199 /* If -ENOENT, this is a no-op entry */
200 if (ret == -ENOENT)
201 continue;
202
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100203 if (ret) {
204 debug("%s: could not get parent clock %d for %s\n",
205 __func__, index, dev_read_name(dev));
206 return ret;
207 }
208
209 ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
210 index, &clk);
211 if (ret) {
212 debug("%s: could not get assigned clock %d for %s\n",
213 __func__, index, dev_read_name(dev));
214 return ret;
215 }
216
217 ret = clk_set_parent(&clk, &parent_clk);
218
219 /*
220 * Not all drivers may support clock-reparenting (as of now).
221 * Ignore errors due to this.
222 */
223 if (ret == -ENOSYS)
224 continue;
225
226 if (ret) {
227 debug("%s: failed to reparent clock %d for %s\n",
228 __func__, index, dev_read_name(dev));
229 return ret;
230 }
231 }
232
233 return 0;
234}
235
236static int clk_set_default_rates(struct udevice *dev)
237{
238 struct clk clk;
239 int index;
240 int num_rates;
241 int size;
242 int ret = 0;
243 u32 *rates = NULL;
244
245 size = dev_read_size(dev, "assigned-clock-rates");
246 if (size < 0)
247 return 0;
248
249 num_rates = size / sizeof(u32);
250 rates = calloc(num_rates, sizeof(u32));
251 if (!rates)
252 return -ENOMEM;
253
254 ret = dev_read_u32_array(dev, "assigned-clock-rates", rates, num_rates);
255 if (ret)
256 goto fail;
257
258 for (index = 0; index < num_rates; index++) {
Neil Armstrongf3cc6312018-07-26 15:19:32 +0200259 /* If 0 is passed, this is a no-op */
260 if (!rates[index])
261 continue;
262
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100263 ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
264 index, &clk);
265 if (ret) {
266 debug("%s: could not get assigned clock %d for %s\n",
267 __func__, index, dev_read_name(dev));
268 continue;
269 }
270
271 ret = clk_set_rate(&clk, rates[index]);
272 if (ret < 0) {
Simon Glass33363732019-01-21 14:53:19 -0700273 debug("%s: failed to set rate on clock index %d (%ld) for %s\n",
274 __func__, index, clk.id, dev_read_name(dev));
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100275 break;
276 }
277 }
278
279fail:
280 free(rates);
281 return ret;
282}
283
284int clk_set_defaults(struct udevice *dev)
285{
286 int ret;
287
Philipp Tomsiche546ec82018-11-26 20:20:19 +0100288 /* If this not in SPL and pre-reloc state, don't take any action. */
289 if (!(IS_ENABLED(CONFIG_SPL_BUILD) || (gd->flags & GD_FLG_RELOC)))
290 return 0;
291
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100292 debug("%s(%s)\n", __func__, dev_read_name(dev));
293
294 ret = clk_set_default_parents(dev);
295 if (ret)
296 return ret;
297
298 ret = clk_set_default_rates(dev);
299 if (ret < 0)
300 return ret;
301
302 return 0;
303}
Michal Simek30d40b32016-07-14 13:11:37 +0200304# endif /* OF_PLATDATA */
Stephen Warrena9622432016-06-17 09:44:00 -0600305
306int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)
307{
308 int index;
309
310 debug("%s(dev=%p, name=%s, clk=%p)\n", __func__, dev, name, clk);
Patrice Chotard96fc03d2017-07-18 11:57:07 +0200311 clk->dev = NULL;
Stephen Warrena9622432016-06-17 09:44:00 -0600312
Simon Glass2558bff2017-05-30 21:47:29 -0600313 index = dev_read_stringlist_search(dev, "clock-names", name);
Stephen Warrena9622432016-06-17 09:44:00 -0600314 if (index < 0) {
Simon Glassb0ea7402016-10-02 17:59:28 -0600315 debug("fdt_stringlist_search() failed: %d\n", index);
Stephen Warrena9622432016-06-17 09:44:00 -0600316 return index;
317 }
318
319 return clk_get_by_index(dev, index, clk);
Simon Glass0342bd22016-01-20 19:43:02 -0700320}
Patrice Chotardcafc3412017-07-25 13:24:45 +0200321
322int clk_release_all(struct clk *clk, int count)
323{
324 int i, ret;
325
326 for (i = 0; i < count; i++) {
327 debug("%s(clk[%d]=%p)\n", __func__, i, &clk[i]);
328
329 /* check if clock has been previously requested */
330 if (!clk[i].dev)
331 continue;
332
333 ret = clk_disable(&clk[i]);
334 if (ret && ret != -ENOSYS)
335 return ret;
336
337 ret = clk_free(&clk[i]);
338 if (ret && ret != -ENOSYS)
339 return ret;
340 }
341
342 return 0;
343}
344
Simon Glass589d9152016-07-04 11:58:03 -0600345#endif /* OF_CONTROL */
Stephen Warrena9622432016-06-17 09:44:00 -0600346
347int clk_request(struct udevice *dev, struct clk *clk)
348{
Mario Six799fe562018-01-15 11:06:51 +0100349 const struct clk_ops *ops = clk_dev_ops(dev);
Stephen Warrena9622432016-06-17 09:44:00 -0600350
351 debug("%s(dev=%p, clk=%p)\n", __func__, dev, clk);
352
353 clk->dev = dev;
354
355 if (!ops->request)
356 return 0;
357
358 return ops->request(clk);
359}
360
361int clk_free(struct clk *clk)
362{
Mario Six799fe562018-01-15 11:06:51 +0100363 const struct clk_ops *ops = clk_dev_ops(clk->dev);
Stephen Warrena9622432016-06-17 09:44:00 -0600364
365 debug("%s(clk=%p)\n", __func__, clk);
366
367 if (!ops->free)
368 return 0;
369
370 return ops->free(clk);
371}
372
373ulong clk_get_rate(struct clk *clk)
374{
Mario Six799fe562018-01-15 11:06:51 +0100375 const struct clk_ops *ops = clk_dev_ops(clk->dev);
Stephen Warrena9622432016-06-17 09:44:00 -0600376
377 debug("%s(clk=%p)\n", __func__, clk);
378
379 if (!ops->get_rate)
380 return -ENOSYS;
381
382 return ops->get_rate(clk);
383}
384
Lukasz Majewski9e38dc32019-06-24 15:50:42 +0200385struct clk *clk_get_parent(struct clk *clk)
386{
387 struct udevice *pdev;
388 struct clk *pclk;
389
390 debug("%s(clk=%p)\n", __func__, clk);
391
392 pdev = dev_get_parent(clk->dev);
393 pclk = dev_get_clk_ptr(pdev);
394 if (!pclk)
395 return ERR_PTR(-ENODEV);
396
397 return pclk;
398}
399
Lukasz Majewski53155da2019-06-24 15:50:43 +0200400long long clk_get_parent_rate(struct clk *clk)
401{
402 const struct clk_ops *ops;
403 struct clk *pclk;
404
405 debug("%s(clk=%p)\n", __func__, clk);
406
407 pclk = clk_get_parent(clk);
408 if (IS_ERR(pclk))
409 return -ENODEV;
410
411 ops = clk_dev_ops(pclk->dev);
412 if (!ops->get_rate)
413 return -ENOSYS;
414
Lukasz Majewski4ef32172019-06-24 15:50:46 +0200415 /* Read the 'rate' if not already set or if proper flag set*/
416 if (!pclk->rate || pclk->flags & CLK_GET_RATE_NOCACHE)
Lukasz Majewski53155da2019-06-24 15:50:43 +0200417 pclk->rate = clk_get_rate(pclk);
418
419 return pclk->rate;
420}
421
Stephen Warrena9622432016-06-17 09:44:00 -0600422ulong clk_set_rate(struct clk *clk, ulong rate)
423{
Mario Six799fe562018-01-15 11:06:51 +0100424 const struct clk_ops *ops = clk_dev_ops(clk->dev);
Stephen Warrena9622432016-06-17 09:44:00 -0600425
426 debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
427
428 if (!ops->set_rate)
429 return -ENOSYS;
430
431 return ops->set_rate(clk, rate);
432}
433
Philipp Tomsichf8e02b22018-01-08 11:15:08 +0100434int clk_set_parent(struct clk *clk, struct clk *parent)
435{
436 const struct clk_ops *ops = clk_dev_ops(clk->dev);
437
438 debug("%s(clk=%p, parent=%p)\n", __func__, clk, parent);
439
440 if (!ops->set_parent)
441 return -ENOSYS;
442
443 return ops->set_parent(clk, parent);
444}
445
Stephen Warrena9622432016-06-17 09:44:00 -0600446int clk_enable(struct clk *clk)
447{
Mario Six799fe562018-01-15 11:06:51 +0100448 const struct clk_ops *ops = clk_dev_ops(clk->dev);
Stephen Warrena9622432016-06-17 09:44:00 -0600449
450 debug("%s(clk=%p)\n", __func__, clk);
451
452 if (!ops->enable)
453 return -ENOSYS;
454
455 return ops->enable(clk);
456}
457
Neil Armstrong8a275a02018-04-03 11:44:18 +0200458int clk_enable_bulk(struct clk_bulk *bulk)
459{
460 int i, ret;
461
462 for (i = 0; i < bulk->count; i++) {
463 ret = clk_enable(&bulk->clks[i]);
464 if (ret < 0 && ret != -ENOSYS)
465 return ret;
466 }
467
468 return 0;
469}
470
Stephen Warrena9622432016-06-17 09:44:00 -0600471int clk_disable(struct clk *clk)
472{
Mario Six799fe562018-01-15 11:06:51 +0100473 const struct clk_ops *ops = clk_dev_ops(clk->dev);
Stephen Warrena9622432016-06-17 09:44:00 -0600474
475 debug("%s(clk=%p)\n", __func__, clk);
476
477 if (!ops->disable)
478 return -ENOSYS;
479
480 return ops->disable(clk);
481}
Simon Glass36ad2342015-06-23 15:39:15 -0600482
Neil Armstrong8a275a02018-04-03 11:44:18 +0200483int clk_disable_bulk(struct clk_bulk *bulk)
484{
485 int i, ret;
486
487 for (i = 0; i < bulk->count; i++) {
488 ret = clk_disable(&bulk->clks[i]);
489 if (ret < 0 && ret != -ENOSYS)
490 return ret;
491 }
492
493 return 0;
494}
495
Lukasz Majewski12014be2019-06-24 15:50:44 +0200496int clk_get_by_id(ulong id, struct clk **clkp)
497{
498 struct udevice *dev;
499 struct uclass *uc;
500 int ret;
501
502 ret = uclass_get(UCLASS_CLK, &uc);
503 if (ret)
504 return ret;
505
506 uclass_foreach_dev(dev, uc) {
507 struct clk *clk = dev_get_clk_ptr(dev);
508
509 if (clk && clk->id == id) {
510 *clkp = clk;
511 return 0;
512 }
513 }
514
515 return -ENOENT;
516}
517
Simon Glass36ad2342015-06-23 15:39:15 -0600518UCLASS_DRIVER(clk) = {
519 .id = UCLASS_CLK,
520 .name = "clk",
521};