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git01.mediatek.com / filogic / uboot / fd5c8845db8c3ce1d7cd29797cdf64ea188a8670 / . / arch / arm / dts / r8a77980-condor-u-boot.dtsi
blob: 34a735ae5b2e05e00eb32552bd8de409d0f96866 [file] [log] [blame]
Marek Vasutb700f032019-07-29 19:59:44 +0200[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source extras for U-Boot for the Condor board
4 *
5 * Copyright (C) 2019 Marek Vasut <marek.vasut@gmail.com>
6 */
7
Marek Vasutb700f032019-07-29 19:59:44 +0200[diff] [blame]8#include "r8a77980-u-boot.dtsi"
9
10/ {
11 aliases {
12 spi0 = &rpc;
13 };
Tam Nguyen5d5664f2023-02-27 23:58:47 +0100[diff] [blame]14
15 sysinfo {
16 compatible = "renesas,rcar-sysinfo";
17 i2c-eeprom = <&sysinfo_eeprom>;
Tom Rini8220add12023-03-14 10:58:41 -0400[diff] [blame]18 bootph-all;
Tam Nguyen5d5664f2023-02-27 23:58:47 +0100[diff] [blame]19 };
20};
21
22&i2c0 {
Tom Rini8220add12023-03-14 10:58:41 -0400[diff] [blame]23 bootph-all;
Tam Nguyen5d5664f2023-02-27 23:58:47 +0100[diff] [blame]24
25 sysinfo_eeprom: eeprom@50 {
26 compatible = "rohm,br24t01", "atmel,24c01";
27 reg = <0x50>;
28 pagesize = <8>;
Tom Rini8220add12023-03-14 10:58:41 -0400[diff] [blame]29 bootph-all;
Tam Nguyen5d5664f2023-02-27 23:58:47 +0100[diff] [blame]30 };
Marek Vasutb700f032019-07-29 19:59:44 +0200[diff] [blame]31};
32
33&rpc {
34 num-cs = <1>;
35 status = "okay";
36 spi-max-frequency = <50000000>;
37 #address-cells = <1>;
38 #size-cells = <0>;
39
40 flash0: spi-flash@0 {
41 #address-cells = <1>;
42 #size-cells = <1>;
43 compatible = "s25fs512s", "jedec,spi-nor";
Marek Vasut94254b92022-12-22 22:17:20 +0100[diff] [blame]44 m25p,fast-read;
Marek Vasutb700f032019-07-29 19:59:44 +0200[diff] [blame]45 spi-max-frequency = <50000000>;
46 spi-tx-bus-width = <1>;
47 spi-rx-bus-width = <1>;
48 reg = <0>;
49 status = "okay";
50 };
51};