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Tim Harvey1b7fbf62021-06-30 16:50:02 -07001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2020 Gateworks Corporation
4 */
5
Tim Harveyb0606c22021-08-24 12:04:00 -07006#include "imx8mm-venice-u-boot.dtsi"
Tim Harvey1b7fbf62021-06-30 16:50:02 -07007
Tim Harveya5953f92022-04-13 09:02:44 -07008&gpio1 {
9 uart1_rs422 {
10 gpio-hog;
11 output-high;
12 gpios = <0 GPIO_ACTIVE_HIGH>;
13 line-name = "uart1_rs422#";
14 };
15
16 uart1rs485 {
17 gpio-hog;
18 output-high;
19 gpios = <3 GPIO_ACTIVE_HIGH>;
20 line-name = "uart1_rs485#";
21 };
22
23 uart1rs232 {
24 gpio-hog;
25 output-high;
26 gpios = <5 GPIO_ACTIVE_HIGH>;
27 line-name = "uart1_rs232#";
28 };
29
30 dig1in {
31 gpio-hog;
32 input;
33 gpios = <6 GPIO_ACTIVE_HIGH>;
34 line-name = "dig1_in";
35 };
36
37 dig1out {
38 gpio-hog;
39 output-low;
40 gpios = <7 GPIO_ACTIVE_HIGH>;
41 line-name = "dig1_out";
42 };
43};
44
45&gpio4 {
Tim Harvey6cb4ada2024-03-25 09:27:02 -070046 dig1ctl {
47 gpio-hog;
48 output-low;
49 gpios = <4 GPIO_ACTIVE_HIGH>;
50 line-name = "dig1_ctl";
51 };
52
53 dig2ctl {
54 gpio-hog;
55 output-low;
56 gpios = <5 GPIO_ACTIVE_HIGH>;
57 line-name = "dig2_ctl";
58 };
59
Tim Harveya5953f92022-04-13 09:02:44 -070060 uart3_rs232 {
61 gpio-hog;
62 output-high;
63 gpios = <6 GPIO_ACTIVE_HIGH>;
64 line-name = "uart3_rs232#";
65 };
66
67 uart3_rs422 {
68 gpio-hog;
69 output-high;
70 gpios = <7 GPIO_ACTIVE_HIGH>;
71 line-name = "uart3_rs422#";
72 };
73
74 uart3_rs485 {
75 gpio-hog;
76 output-high;
77 gpios = <8 GPIO_ACTIVE_HIGH>;
78 line-name = "uart3_rs485#";
79 };
80
81 uart4_rs485 {
82 gpio-hog;
83 output-high;
84 gpios = <27 GPIO_ACTIVE_HIGH>;
85 line-name = "uart4_rs485#";
86 };
87
88 sim1det {
89 gpio-hog;
90 input;
91 gpios = <29 GPIO_ACTIVE_HIGH>;
92 line-name = "sim1_det";
93 };
94
95 sim2det {
96 gpio-hog;
97 input;
98 gpios = <30 GPIO_ACTIVE_HIGH>;
99 line-name = "sim2_det";
100 };
101};
102
103&gpio5 {
104 dig2out {
105 gpio-hog;
106 output-low;
107 gpios = <3 GPIO_ACTIVE_HIGH>;
108 line-name = "dig2_out";
109 };
110
111 dig2in {
112 gpio-hog;
113 input;
114 gpios = <4 GPIO_ACTIVE_HIGH>;
115 line-name = "dig2_in";
116 };
117
118 sim2sel {
119 gpio-hog;
120 output-low;
121 gpios = <5 GPIO_ACTIVE_HIGH>;
122 line-name = "sim2_sel";
123 };
124
125 uart4_rs232 {
126 gpio-hog;
127 output-high;
128 gpios = <10 GPIO_ACTIVE_HIGH>;
129 line-name = "uart4_rs232#";
130 };
131
132 uart4_rs422 {
133 gpio-hog;
134 output-high;
135 gpios = <13 GPIO_ACTIVE_HIGH>;
136 line-name = "uart4_rs422#";
137 };
138};
139
Tim Harvey1b7fbf62021-06-30 16:50:02 -0700140&fec1 {
141 phy-reset-gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
142 phy-reset-duration = <1>;
143 phy-reset-post-delay = <1>;
144};
145
Tim Harveyd1ac6352022-09-09 14:42:38 -0700146&switch {
147 ports {
148 #address-cells = <1>;
149 #size-cells = <0>;
150
151 lan1: port@0 {
152 phy-handle = <&sw_phy0>;
153 };
154
155 lan2: port@1 {
156 phy-handle = <&sw_phy1>;
157 };
158
159 lan3: port@2 {
160 phy-handle = <&sw_phy2>;
161 };
162
163 lan4: port@3 {
164 phy-handle = <&sw_phy3>;
165 };
166 };
167
168 mdios {
169 #address-cells = <1>;
170 #size-cells = <0>;
171
172 mdio@0 {
173 reg = <0>;
174 compatible = "microchip,ksz-mdio";
175 #address-cells = <1>;
176 #size-cells = <0>;
177
178 sw_phy0: ethernet-phy@0 {
179 reg = <0x0>;
180 };
181
182 sw_phy1: ethernet-phy@1 {
183 reg = <0x1>;
184 };
185
186 sw_phy2: ethernet-phy@2 {
187 reg = <0x2>;
188 };
189
190 sw_phy3: ethernet-phy@3 {
191 reg = <0x3>;
192 };
193 };
194 };
195};
196
Tim Harveyb0606c22021-08-24 12:04:00 -0700197&pinctrl_fec1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700198 bootph-pre-ram;
Tim Harveyb0606c22021-08-24 12:04:00 -0700199};
200
Tim Harvey1b7fbf62021-06-30 16:50:02 -0700201&{/soc@0/bus@30800000/i2c@30a30000/pmic@4b} {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700202 bootph-pre-ram;
Tim Harvey1b7fbf62021-06-30 16:50:02 -0700203};
204
205&{/soc@0/bus@30800000/i2c@30a30000/pmic@4b/regulators} {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700206 bootph-pre-ram;
Tim Harvey1b7fbf62021-06-30 16:50:02 -0700207};
208
209&pinctrl_pmic {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700210 bootph-pre-ram;
Tim Harvey1b7fbf62021-06-30 16:50:02 -0700211};