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git01.mediatek.com / filogic / uboot / fd5259aec44715748d3a8f08da4da5155508ea0d / . / arch / arm / mach-rmobile / memmap-gen3.c
blob: 92c8f2e80db762ddc78f3702b9e85badf3201f74 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
Marek Vasut23e239a2017-11-25 23:24:01 +0100[diff] [blame]2/*
3 * Renesas RCar Gen3 memory map tables
4 *
5 * Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com>
Marek Vasut23e239a2017-11-25 23:24:01 +0100[diff] [blame]6 */
7
8#include <common.h>
9#include <asm/armv8/mmu.h>
10
Marek Vasuta5abacc2018-02-15 13:19:33 +0100[diff] [blame]11static struct mm_region gen3_mem_map[] = {
Marek Vasut23e239a2017-11-25 23:24:01 +0100[diff] [blame]12 {
13 .virt = 0x0UL,
14 .phys = 0x0UL,
Marek Vasuta5abacc2018-02-15 13:19:33 +0100[diff] [blame]15 .size = 0x40000000UL,
Marek Vasut23e239a2017-11-25 23:24:01 +0100[diff] [blame]16 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
17 PTE_BLOCK_NON_SHARE |
18 PTE_BLOCK_PXN | PTE_BLOCK_UXN
19 }, {
Marek Vasuta5abacc2018-02-15 13:19:33 +0100[diff] [blame]20 .virt = 0x40000000UL,
21 .phys = 0x40000000UL,
22 .size = 0x80000000UL,
Marek Vasut04cd2e22017-10-08 20:52:52 +0200[diff] [blame]23 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
24 PTE_BLOCK_INNER_SHARE
25 }, {
Marek Vasuta5abacc2018-02-15 13:19:33 +0100[diff] [blame]26 .virt = 0xc0000000UL,
27 .phys = 0xc0000000UL,
28 .size = 0x40000000UL,
Marek Vasut04cd2e22017-10-08 20:52:52 +0200[diff] [blame]29 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
30 PTE_BLOCK_NON_SHARE |
31 PTE_BLOCK_PXN | PTE_BLOCK_UXN
32 }, {
Marek Vasut48bbd492018-10-02 21:42:49 +0200[diff] [blame]33 .virt = 0x100000000UL,
34 .phys = 0x100000000UL,
35 .size = 0xf00000000UL,
36 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
37 PTE_BLOCK_INNER_SHARE
38 }, {
Marek Vasut04cd2e22017-10-08 20:52:52 +0200[diff] [blame]39 /* List terminator */
40 0,
41 }
42};
43
Marek Vasuta5abacc2018-02-15 13:19:33 +0100[diff] [blame]44struct mm_region *mem_map = gen3_mem_map;