| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * LiteX-based System on Chip |
| 4 | * |
| 5 | * Copyright (C) 2019 Antmicro <www.antmicro.com> |
| 6 | */ |
| 7 | |
| 8 | /dts-v1/; |
| 9 | / { |
| 10 | compatible = "opencores,or1ksim"; |
| 11 | #address-cells = <1>; |
| 12 | #size-cells = <1>; |
| 13 | interrupt-parent = <&pic>; |
| 14 | |
| 15 | aliases { |
| 16 | serial0 = &serial0; |
| 17 | }; |
| 18 | |
| 19 | chosen { |
| 20 | bootargs = "console=liteuart"; |
| 21 | }; |
| 22 | |
| 23 | memory@0 { |
| 24 | device_type = "memory"; |
| 25 | reg = <0x00000000 0x10000000>; |
| 26 | }; |
| 27 | |
| 28 | cpus { |
| 29 | #address-cells = <1>; |
| 30 | #size-cells = <0>; |
| 31 | cpu@0 { |
| 32 | compatible = "opencores,or1200-rtlsvn481"; |
| 33 | reg = <0>; |
| 34 | clock-frequency = <100000000>; |
| 35 | }; |
| 36 | }; |
| 37 | |
| 38 | pic: pic { |
| 39 | compatible = "opencores,or1k-pic"; |
| 40 | #interrupt-cells = <1>; |
| 41 | interrupt-controller; |
| 42 | }; |
| 43 | |
| 44 | serial0: serial@e0006800 { |
| 45 | device_type = "serial"; |
| 46 | compatible = "litex,liteuart"; |
| 47 | reg = <0xe0006800 0x100>; |
| 48 | }; |
| 49 | |
| 50 | soc_ctrl0: soc_controller@e0000000 { |
| 51 | compatible = "litex,soc-controller"; |
| 52 | reg = <0xe0000000 0xc>; |
| 53 | status = "okay"; |
| 54 | }; |
| 55 | |
| 56 | ethernet@e0001000 { |
| 57 | compatible = "litex,liteeth"; |
| 58 | reg = <0xe0001000 0x7c>, |
| 59 | <0xe0001800 0x0a>, |
| 60 | <0x80000000 0x2000>; |
| 61 | reg-names = "mac", "mdio", "buffer"; |
| 62 | interrupts = <2>; |
| 63 | }; |
| 64 | }; |