Haavard Skinnemoen | 2f5bfb7 | 2008-05-16 11:10:33 +0200 | [diff] [blame] | 1 | /* |
| 2 | * SPI flash internal definitions |
| 3 | * |
| 4 | * Copyright (C) 2008 Atmel Corporation |
| 5 | */ |
| 6 | |
Mike Frysinger | 01e79ae | 2009-04-02 08:11:31 -0400 | [diff] [blame] | 7 | /* Common parameters -- kind of high, but they should only occur when there |
| 8 | * is a problem (and well your system already is broken), so err on the side |
| 9 | * of caution in case we're dealing with slower SPI buses and/or processors. |
| 10 | */ |
| 11 | #define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ) |
| 12 | #define SPI_FLASH_PAGE_ERASE_TIMEOUT (5 * CONFIG_SYS_HZ) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 13 | #define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CONFIG_SYS_HZ) |
Haavard Skinnemoen | 2f5bfb7 | 2008-05-16 11:10:33 +0200 | [diff] [blame] | 14 | |
| 15 | /* Common commands */ |
| 16 | #define CMD_READ_ID 0x9f |
| 17 | |
| 18 | #define CMD_READ_ARRAY_SLOW 0x03 |
| 19 | #define CMD_READ_ARRAY_FAST 0x0b |
Haavard Skinnemoen | 2f5bfb7 | 2008-05-16 11:10:33 +0200 | [diff] [blame] | 20 | |
Mike Frysinger | 1302bec | 2012-01-28 16:26:03 -0800 | [diff] [blame] | 21 | #define CMD_WRITE_STATUS 0x01 |
Mike Frysinger | 301e9b4 | 2011-04-25 06:58:29 +0000 | [diff] [blame] | 22 | #define CMD_PAGE_PROGRAM 0x02 |
Mike Frysinger | 7911211 | 2011-04-25 06:59:53 +0000 | [diff] [blame] | 23 | #define CMD_WRITE_DISABLE 0x04 |
Mike Frysinger | 37e13bc | 2011-01-10 02:20:12 -0500 | [diff] [blame] | 24 | #define CMD_READ_STATUS 0x05 |
Jagannadha Sutradharudu Teki | 750f3ac | 2013-06-21 15:56:30 +0530 | [diff] [blame] | 25 | #define CMD_FLAG_STATUS 0x70 |
Mike Frysinger | 53421bb | 2011-01-10 02:20:13 -0500 | [diff] [blame] | 26 | #define CMD_WRITE_ENABLE 0x06 |
Mike Frysinger | 4147798 | 2012-03-04 22:35:50 -0500 | [diff] [blame] | 27 | #define CMD_ERASE_4K 0x20 |
| 28 | #define CMD_ERASE_32K 0x52 |
| 29 | #define CMD_ERASE_64K 0xd8 |
| 30 | #define CMD_ERASE_CHIP 0xc7 |
Mike Frysinger | 37e13bc | 2011-01-10 02:20:12 -0500 | [diff] [blame] | 31 | |
Jagannadha Sutradharudu Teki | 29d70c9 | 2013-06-19 15:37:09 +0530 | [diff] [blame] | 32 | #define SPI_FLASH_16MB_BOUN 0x1000000 |
| 33 | |
Jagannadha Sutradharudu Teki | c6d173d | 2013-06-19 15:33:58 +0530 | [diff] [blame] | 34 | #ifdef CONFIG_SPI_FLASH_BAR |
Jagannadha Sutradharudu Teki | ce08a71 | 2013-06-19 15:31:23 +0530 | [diff] [blame] | 35 | /* Bank addr access commands */ |
Jagannadha Sutradharudu Teki | c6d173d | 2013-06-19 15:33:58 +0530 | [diff] [blame] | 36 | # define CMD_BANKADDR_BRWR 0x17 |
| 37 | # define CMD_BANKADDR_BRRD 0x16 |
| 38 | # define CMD_EXTNADDR_WREAR 0xC5 |
| 39 | # define CMD_EXTNADDR_RDEAR 0xC8 |
| 40 | #endif |
Jagannadha Sutradharudu Teki | ce08a71 | 2013-06-19 15:31:23 +0530 | [diff] [blame] | 41 | |
Mike Frysinger | 37e13bc | 2011-01-10 02:20:12 -0500 | [diff] [blame] | 42 | /* Common status */ |
| 43 | #define STATUS_WIP 0x01 |
Jagannadha Sutradharudu Teki | 750f3ac | 2013-06-21 15:56:30 +0530 | [diff] [blame] | 44 | #define STATUS_PEC 0x80 |
Mike Frysinger | 37e13bc | 2011-01-10 02:20:12 -0500 | [diff] [blame] | 45 | |
Haavard Skinnemoen | 2f5bfb7 | 2008-05-16 11:10:33 +0200 | [diff] [blame] | 46 | /* Send a single-byte command to the device and read the response */ |
| 47 | int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len); |
| 48 | |
| 49 | /* |
| 50 | * Send a multi-byte command to the device and read the response. Used |
| 51 | * for flash array reads, etc. |
| 52 | */ |
| 53 | int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd, |
| 54 | size_t cmd_len, void *data, size_t data_len); |
| 55 | |
Mike Frysinger | 373e7d6 | 2011-01-10 02:20:14 -0500 | [diff] [blame] | 56 | int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset, |
| 57 | size_t len, void *data); |
| 58 | |
Haavard Skinnemoen | 2f5bfb7 | 2008-05-16 11:10:33 +0200 | [diff] [blame] | 59 | /* |
| 60 | * Send a multi-byte command to the device followed by (optional) |
| 61 | * data. Used for programming the flash array, etc. |
| 62 | */ |
| 63 | int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len, |
| 64 | const void *data, size_t data_len); |
| 65 | |
| 66 | /* |
Mike Frysinger | 301e9b4 | 2011-04-25 06:58:29 +0000 | [diff] [blame] | 67 | * Write the requested data out breaking it up into multiple write |
| 68 | * commands as needed per the write size. |
| 69 | */ |
| 70 | int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset, |
| 71 | size_t len, const void *buf); |
| 72 | |
Jagannadha Sutradharudu Teki | 0803242 | 2013-10-02 19:34:53 +0530 | [diff] [blame] | 73 | #ifdef CONFIG_SPI_FLASH_SST |
| 74 | int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len, |
| 75 | const void *buf); |
| 76 | #endif |
| 77 | |
Mike Frysinger | 301e9b4 | 2011-04-25 06:58:29 +0000 | [diff] [blame] | 78 | /* |
Mike Frysinger | 8ec7f4c | 2011-04-23 23:05:55 +0000 | [diff] [blame] | 79 | * Enable writing on the SPI flash. |
| 80 | */ |
| 81 | static inline int spi_flash_cmd_write_enable(struct spi_flash *flash) |
| 82 | { |
| 83 | return spi_flash_cmd(flash->spi, CMD_WRITE_ENABLE, NULL, 0); |
| 84 | } |
| 85 | |
| 86 | /* |
Mike Frysinger | 7911211 | 2011-04-25 06:59:53 +0000 | [diff] [blame] | 87 | * Disable writing on the SPI flash. |
| 88 | */ |
| 89 | static inline int spi_flash_cmd_write_disable(struct spi_flash *flash) |
| 90 | { |
| 91 | return spi_flash_cmd(flash->spi, CMD_WRITE_DISABLE, NULL, 0); |
| 92 | } |
| 93 | |
Mike Frysinger | 6fe6d0d | 2012-03-04 23:18:17 -0500 | [diff] [blame] | 94 | /* Program the status register. */ |
| 95 | int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr); |
| 96 | |
Jagannadha Sutradharudu Teki | c6d173d | 2013-06-19 15:33:58 +0530 | [diff] [blame] | 97 | #ifdef CONFIG_SPI_FLASH_BAR |
Jagannadha Sutradharudu Teki | 950f1ac | 2013-06-13 20:37:19 +0530 | [diff] [blame] | 98 | /* Program the bank address register */ |
| 99 | int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel); |
Jagannadha Sutradharudu Teki | c6d173d | 2013-06-19 15:33:58 +0530 | [diff] [blame] | 100 | #endif |
Jagannadha Sutradharudu Teki | ce08a71 | 2013-06-19 15:31:23 +0530 | [diff] [blame] | 101 | |
Mike Frysinger | 7911211 | 2011-04-25 06:59:53 +0000 | [diff] [blame] | 102 | /* |
Haavard Skinnemoen | 2f5bfb7 | 2008-05-16 11:10:33 +0200 | [diff] [blame] | 103 | * Same as spi_flash_cmd_read() except it also claims/releases the SPI |
| 104 | * bus. Used as common part of the ->read() operation. |
| 105 | */ |
| 106 | int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, |
| 107 | size_t cmd_len, void *data, size_t data_len); |
Jagannadha Sutradharudu Teki | dc78b85 | 2013-06-21 19:19:00 +0530 | [diff] [blame] | 108 | /* |
| 109 | * Used for spi_flash write operation |
| 110 | * - SPI claim |
| 111 | * - spi_flash_cmd_write_enable |
| 112 | * - spi_flash_cmd_write |
| 113 | * - spi_flash_cmd_wait_ready |
| 114 | * - SPI release |
| 115 | */ |
| 116 | int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd, |
| 117 | size_t cmd_len, const void *buf, size_t buf_len); |
Mike Frysinger | 37e13bc | 2011-01-10 02:20:12 -0500 | [diff] [blame] | 118 | |
| 119 | /* |
| 120 | * Send the read status command to the device and wait for the wip |
| 121 | * (write-in-progress) bit to clear itself. |
| 122 | */ |
| 123 | int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout); |
| 124 | |
Mike Frysinger | 53421bb | 2011-01-10 02:20:13 -0500 | [diff] [blame] | 125 | /* Erase sectors. */ |
Mike Frysinger | 4147798 | 2012-03-04 22:35:50 -0500 | [diff] [blame] | 126 | int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len); |
Mike Frysinger | 53421bb | 2011-01-10 02:20:13 -0500 | [diff] [blame] | 127 | |
Haavard Skinnemoen | 2f5bfb7 | 2008-05-16 11:10:33 +0200 | [diff] [blame] | 128 | /* Manufacturer-specific probe functions */ |
| 129 | struct spi_flash *spi_flash_probe_spansion(struct spi_slave *spi, u8 *idcode); |
| 130 | struct spi_flash *spi_flash_probe_atmel(struct spi_slave *spi, u8 *idcode); |
Chong Huang | c71e6dc | 2010-11-30 03:33:25 -0500 | [diff] [blame] | 131 | struct spi_flash *spi_flash_probe_eon(struct spi_slave *spi, u8 *idcode); |
Prafulla Wadaskar | 0956907 | 2009-04-06 21:24:43 +0530 | [diff] [blame] | 132 | struct spi_flash *spi_flash_probe_macronix(struct spi_slave *spi, u8 *idcode); |
Mike Frysinger | f1cb7c8 | 2009-03-27 19:27:58 -0400 | [diff] [blame] | 133 | struct spi_flash *spi_flash_probe_sst(struct spi_slave *spi, u8 *idcode); |
TsiChung Liew | 8dd593a | 2008-08-06 16:08:41 -0500 | [diff] [blame] | 134 | struct spi_flash *spi_flash_probe_stmicro(struct spi_slave *spi, u8 *idcode); |
Jason McMullan | 64e5f3a | 2009-10-09 17:12:23 -0400 | [diff] [blame] | 135 | struct spi_flash *spi_flash_probe_winbond(struct spi_slave *spi, u8 *idcode); |
Reinhard Meyer | 52cb0a7 | 2010-10-05 16:56:40 +0200 | [diff] [blame] | 136 | struct spi_flash *spi_fram_probe_ramtron(struct spi_slave *spi, u8 *idcode); |
Rajeshwari Shinde | 22ea934 | 2013-01-22 20:30:18 +0000 | [diff] [blame] | 137 | struct spi_flash *spi_flash_probe_gigadevice(struct spi_slave *spi, u8 *idcode); |