blob: 14ee6f999bacec50d386e672051fe3407356d8fa [file] [log] [blame]
Peng Fan0c830d32018-10-18 14:28:07 +02001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright 2018 NXP
4 */
5
6#ifndef _SC_SCI_H
7#define _SC_SCI_H
8
9#include <asm/arch/sci/types.h>
10#include <asm/arch/sci/svc/misc/api.h>
11#include <asm/arch/sci/svc/pad/api.h>
12#include <asm/arch/sci/svc/pm/api.h>
13#include <asm/arch/sci/svc/rm/api.h>
Peng Fand4191db2019-09-23 10:12:31 +000014#include <asm/arch/sci/svc/seco/api.h>
Peng Fan0c830d32018-10-18 14:28:07 +020015#include <asm/arch/sci/rpc.h>
16#include <dt-bindings/soc/imx_rsrc.h>
17#include <linux/errno.h>
18
19static inline int sc_err_to_linux(sc_err_t err)
20{
21 int ret;
22
23 switch (err) {
24 case SC_ERR_NONE:
25 return 0;
26 case SC_ERR_VERSION:
27 case SC_ERR_CONFIG:
28 case SC_ERR_PARM:
29 ret = -EINVAL;
30 break;
31 case SC_ERR_NOACCESS:
32 case SC_ERR_LOCKED:
33 case SC_ERR_UNAVAILABLE:
34 ret = -EACCES;
35 break;
36 case SC_ERR_NOTFOUND:
37 case SC_ERR_NOPOWER:
38 ret = -ENODEV;
39 break;
40 case SC_ERR_IPC:
41 ret = -EIO;
42 break;
43 case SC_ERR_BUSY:
44 ret = -EBUSY;
45 break;
46 case SC_ERR_FAIL:
47 ret = -EIO;
48 break;
49 default:
50 ret = 0;
51 break;
52 }
53
54 debug("%s %d %d\n", __func__, err, ret);
55
56 return ret;
57}
58
Peng Fan55486382018-10-18 14:28:12 +020059/* PM API*/
60int sc_pm_set_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource,
61 sc_pm_power_mode_t mode);
Peng Fand4191db2019-09-23 10:12:31 +000062int sc_pm_get_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource,
63 sc_pm_power_mode_t *mode);
Peng Fan55486382018-10-18 14:28:12 +020064int sc_pm_set_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk,
65 sc_pm_clock_rate_t *rate);
66int sc_pm_get_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk,
67 sc_pm_clock_rate_t *rate);
Peng Fan55486382018-10-18 14:28:12 +020068int sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk,
69 sc_bool_t enable, sc_bool_t autog);
Peng Fand4191db2019-09-23 10:12:31 +000070int sc_pm_set_clock_parent(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk,
71 sc_pm_clk_parent_t parent);
72int sc_pm_cpu_start(sc_ipc_t ipc, sc_rsrc_t resource, sc_bool_t enable,
73 sc_faddr_t address);
74sc_bool_t sc_pm_is_partition_started(sc_ipc_t ipc, sc_rm_pt_t pt);
Peng Fan55486382018-10-18 14:28:12 +020075
76/* MISC API */
Peng Fand4191db2019-09-23 10:12:31 +000077int sc_misc_set_control(sc_ipc_t ipc, sc_rsrc_t resource,
78 sc_ctrl_t ctrl, u32 val);
Peng Fan55486382018-10-18 14:28:12 +020079int sc_misc_get_control(sc_ipc_t ipc, sc_rsrc_t resource, sc_ctrl_t ctrl,
80 u32 *val);
81void sc_misc_get_boot_dev(sc_ipc_t ipc, sc_rsrc_t *boot_dev);
82void sc_misc_boot_status(sc_ipc_t ipc, sc_misc_boot_status_t status);
83void sc_misc_build_info(sc_ipc_t ipc, u32 *build, u32 *commit);
84int sc_misc_otp_fuse_read(sc_ipc_t ipc, u32 word, u32 *val);
Peng Fanba44e012019-05-05 13:23:51 +000085int sc_misc_get_temp(sc_ipc_t ipc, sc_rsrc_t resource, sc_misc_temp_t temp,
86 s16 *celsius, s8 *tenths);
Peng Fan55486382018-10-18 14:28:12 +020087
88/* RM API */
89sc_bool_t sc_rm_is_memreg_owned(sc_ipc_t ipc, sc_rm_mr_t mr);
Peng Fand4191db2019-09-23 10:12:31 +000090int sc_rm_find_memreg(sc_ipc_t ipc, sc_rm_mr_t *mr, sc_faddr_t addr_start,
91 sc_faddr_t addr_end);
92int sc_rm_set_memreg_permissions(sc_ipc_t ipc, sc_rm_mr_t mr,
93 sc_rm_pt_t pt, sc_rm_perm_t perm);
Peng Fan55486382018-10-18 14:28:12 +020094int sc_rm_get_memreg_info(sc_ipc_t ipc, sc_rm_mr_t mr, sc_faddr_t *addr_start,
95 sc_faddr_t *addr_end);
96sc_bool_t sc_rm_is_resource_owned(sc_ipc_t ipc, sc_rsrc_t resource);
Peng Fand4191db2019-09-23 10:12:31 +000097int sc_rm_partition_alloc(sc_ipc_t ipc, sc_rm_pt_t *pt, sc_bool_t secure,
98 sc_bool_t isolated, sc_bool_t restricted,
99 sc_bool_t grant, sc_bool_t coherent);
100int sc_rm_partition_free(sc_ipc_t ipc, sc_rm_pt_t pt);
101int sc_rm_get_partition(sc_ipc_t ipc, sc_rm_pt_t *pt);
102int sc_rm_set_parent(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rm_pt_t pt_parent);
103int sc_rm_assign_resource(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rsrc_t resource);
104int sc_rm_assign_pad(sc_ipc_t ipc, sc_rm_pt_t pt, sc_pad_t pad);
105sc_bool_t sc_rm_is_pad_owned(sc_ipc_t ipc, sc_pad_t pad);
106int sc_rm_get_resource_owner(sc_ipc_t ipc, sc_rsrc_t resource,
107 sc_rm_pt_t *pt);
Peng Fan55486382018-10-18 14:28:12 +0200108
109/* PAD API */
110int sc_pad_set(sc_ipc_t ipc, sc_pad_t pad, u32 val);
Peng Fand4191db2019-09-23 10:12:31 +0000111
112/* SMMU API */
113int sc_rm_set_master_sid(sc_ipc_t ipc, sc_rsrc_t resource, sc_rm_sid_t sid);
114
115/* SECO API */
116int sc_seco_authenticate(sc_ipc_t ipc, sc_seco_auth_cmd_t cmd,
117 sc_faddr_t addr);
118int sc_seco_forward_lifecycle(sc_ipc_t ipc, u32 change);
119int sc_seco_chip_info(sc_ipc_t ipc, u16 *lc, u16 *monotonic, u32 *uid_l,
120 u32 *uid_h);
121void sc_seco_build_info(sc_ipc_t ipc, u32 *version, u32 *commit);
122int sc_seco_get_event(sc_ipc_t ipc, u8 idx, u32 *event);
123int sc_seco_gen_key_blob(sc_ipc_t ipc, u32 id, sc_faddr_t load_addr,
124 sc_faddr_t export_addr, u16 max_size);
125
Peng Fan0c830d32018-10-18 14:28:07 +0200126#endif