| Thomas Chou | e51b65e | 2015-11-07 14:20:31 +0800 | [diff] [blame] | 1 | menu "MTD Support" |
| 2 | |
| Miquel Raynal | d31c478 | 2018-08-16 17:30:18 +0200 | [diff] [blame] | 3 | config MTD_PARTITIONS |
| 4 | bool |
| 5 | |
| Miquel Raynal | 2e35dbb | 2019-10-03 19:50:05 +0200 | [diff] [blame] | 6 | config MTD |
| 7 | bool "Enable MTD layer" |
| 8 | help |
| Heinrich Schuchardt | 382561d | 2020-09-17 18:07:44 +0200 | [diff] [blame] | 9 | Enable the MTD stack, necessary to interact with NAND, NOR, |
| 10 | SPI-NOR, SPI-NAND, OneNAND, etc. |
| Miquel Raynal | 2e35dbb | 2019-10-03 19:50:05 +0200 | [diff] [blame] | 11 | |
| Miquel Raynal | a903be4 | 2019-10-03 19:50:04 +0200 | [diff] [blame] | 12 | config DM_MTD |
| Thomas Chou | e51b65e | 2015-11-07 14:20:31 +0800 | [diff] [blame] | 13 | bool "Enable Driver Model for MTD drivers" |
| 14 | depends on DM |
| 15 | help |
| 16 | Enable driver model for Memory Technology Devices (MTD), such as |
| 17 | flash, RAM and similar chips, often used for solid state file |
| 18 | systems on embedded devices. |
| 19 | |
| Masahiro Yamada | 8cea9b5 | 2017-02-11 22:43:54 +0900 | [diff] [blame] | 20 | config MTD_NOR_FLASH |
| 21 | bool "Enable parallel NOR flash support" |
| 22 | help |
| 23 | Enable support for parallel NOR flash. |
| 24 | |
| Patrick Delaunay | e1287ba | 2020-02-26 10:28:42 +0100 | [diff] [blame] | 25 | config SYS_MTDPARTS_RUNTIME |
| 26 | bool "Allow MTDPARTS to be configured at runtime" |
| 27 | depends on MTD |
| 28 | help |
| 29 | This option allows to call the function board_mtdparts_default to |
| 30 | dynamically build the variables mtdids and mtdparts at runtime. |
| 31 | |
| Adam Ford | 76da1b2 | 2018-10-14 15:10:50 -0500 | [diff] [blame] | 32 | config FLASH_CFI_DRIVER |
| 33 | bool "Enable CFI Flash driver" |
| 34 | help |
| 35 | The Common Flash Interface specification was developed by Intel, |
| 36 | AMD and other flash manufactures. It provides a universal method |
| 37 | for probing the capabilities of flash devices. If you wish to |
| 38 | support any device that is CFI-compliant, you need to enable this |
| 39 | option. Visit <http://www.amd.com/products/nvd/overview/cfi.html> |
| 40 | for more information on CFI. |
| 41 | |
| Thomas Chou | 47eae23 | 2015-11-07 14:31:08 +0800 | [diff] [blame] | 42 | config CFI_FLASH |
| 43 | bool "Enable Driver Model for CFI Flash driver" |
| Miquel Raynal | a903be4 | 2019-10-03 19:50:04 +0200 | [diff] [blame] | 44 | depends on DM_MTD |
| Bin Meng | c78add4 | 2021-08-07 13:00:00 +0800 | [diff] [blame] | 45 | select FLASH_CFI_DRIVER |
| Thomas Chou | 47eae23 | 2015-11-07 14:31:08 +0800 | [diff] [blame] | 46 | help |
| 47 | The Common Flash Interface specification was developed by Intel, |
| 48 | AMD and other flash manufactures. It provides a universal method |
| 49 | for probing the capabilities of flash devices. If you wish to |
| 50 | support any device that is CFI-compliant, you need to enable this |
| 51 | option. Visit <http://www.amd.com/products/nvd/overview/cfi.html> |
| 52 | for more information on CFI. |
| 53 | |
| Adam Ford | 76da1b2 | 2018-10-14 15:10:50 -0500 | [diff] [blame] | 54 | config SYS_FLASH_USE_BUFFER_WRITE |
| 55 | bool "Enable buffered writes to flash" |
| 56 | depends on FLASH_CFI_DRIVER |
| 57 | help |
| 58 | Use buffered writes to flash. |
| 59 | |
| 60 | config FLASH_CFI_MTD |
| 61 | bool "Enable CFI MTD driver" |
| 62 | depends on FLASH_CFI_DRIVER |
| 63 | help |
| 64 | This option enables the building of the cfi_mtd driver |
| 65 | in the drivers directory. The driver exports CFI flash |
| 66 | to the MTD layer. |
| 67 | |
| 68 | config SYS_FLASH_PROTECTION |
| 69 | bool "Use hardware flash protection" |
| 70 | depends on FLASH_CFI_DRIVER |
| 71 | help |
| 72 | If defined, hardware flash sectors protection is used |
| 73 | instead of U-Boot software protection. |
| 74 | |
| 75 | config SYS_FLASH_CFI |
| 76 | bool "Define extra elements in CFI for flash geometry" |
| 77 | depends on FLASH_CFI_DRIVER |
| 78 | help |
| 79 | Define if the flash driver uses extra elements in the |
| 80 | common flash structure for storing flash geometry. |
| 81 | |
| Thomas Chou | cdc1152 | 2015-11-09 14:56:02 +0800 | [diff] [blame] | 82 | config ALTERA_QSPI |
| 83 | bool "Altera Generic Quad SPI Controller" |
| Miquel Raynal | a903be4 | 2019-10-03 19:50:04 +0200 | [diff] [blame] | 84 | depends on DM_MTD |
| Thomas Chou | cdc1152 | 2015-11-09 14:56:02 +0800 | [diff] [blame] | 85 | help |
| 86 | This enables access to Altera EPCQ/EPCS flash chips using the |
| 87 | Altera Generic Quad SPI Controller. The controller converts SPI |
| 88 | NOR flash to parallel flash interface. Please find details on the |
| 89 | "Embedded Peripherals IP User Guide" of Altera. |
| 90 | |
| Purna Chandra Mandal | 1d73e9b | 2016-03-18 18:36:08 +0530 | [diff] [blame] | 91 | config FLASH_PIC32 |
| 92 | bool "Microchip PIC32 Flash driver" |
| Miquel Raynal | a903be4 | 2019-10-03 19:50:04 +0200 | [diff] [blame] | 93 | depends on MACH_PIC32 && DM_MTD |
| Purna Chandra Mandal | 1d73e9b | 2016-03-18 18:36:08 +0530 | [diff] [blame] | 94 | help |
| 95 | This enables access to Microchip PIC32 internal non-CFI flash |
| 96 | chips through PIC32 Non-Volatile-Memory Controller. |
| 97 | |
| Marek Vasut | c1cb356 | 2017-08-19 23:24:08 +0200 | [diff] [blame] | 98 | config RENESAS_RPC_HF |
| Heinrich Schuchardt | 382561d | 2020-09-17 18:07:44 +0200 | [diff] [blame] | 99 | bool "Renesas RCar Gen3 RPC HyperFlash driver" |
| Miquel Raynal | a903be4 | 2019-10-03 19:50:04 +0200 | [diff] [blame] | 100 | depends on RCAR_GEN3 && DM_MTD |
| Marek Vasut | c1cb356 | 2017-08-19 23:24:08 +0200 | [diff] [blame] | 101 | help |
| Heinrich Schuchardt | 382561d | 2020-09-17 18:07:44 +0200 | [diff] [blame] | 102 | This enables access to HyperFlash memory through the Renesas |
| Marek Vasut | c1cb356 | 2017-08-19 23:24:08 +0200 | [diff] [blame] | 103 | RCar Gen3 RPC controller. |
| 104 | |
| Vignesh Raghavendra | 2736c67 | 2019-10-23 13:30:01 +0530 | [diff] [blame] | 105 | config HBMC_AM654 |
| 106 | bool "HyperBus controller driver for AM65x SoC" |
| 107 | depends on SYSCON |
| 108 | help |
| 109 | This is the driver for HyperBus controller on TI's AM65x and |
| 110 | other SoCs |
| 111 | |
| Patrick Delaunay | 754ff3b | 2021-10-04 11:05:52 +0200 | [diff] [blame] | 112 | config STM32_FLASH |
| 113 | bool "STM32 MCU Flash driver" |
| 114 | depends on ARCH_STM32 |
| 115 | help |
| 116 | This is the driver of embedded flash for some STMicroelectronics |
| 117 | STM32 MCU. |
| 118 | |
| Masahiro Yamada | c343b38 | 2014-10-03 19:21:03 +0900 | [diff] [blame] | 119 | source "drivers/mtd/nand/Kconfig" |
| Simon Glass | d8b771d | 2015-02-05 21:41:35 -0700 | [diff] [blame] | 120 | |
| Tom Rini | 64fc331 | 2021-09-22 14:50:36 -0400 | [diff] [blame] | 121 | config SYS_NAND_MAX_CHIPS |
| 122 | int "NAND max chips" |
| 123 | depends on MTD_RAW_NAND || CMD_ONENAND || TARGET_S5PC210_UNIVERSAL || \ |
| 124 | SPL_OMAP3_ID_NAND |
| 125 | default 1 |
| 126 | help |
| 127 | The maximum number of NAND chips per device to be supported. |
| 128 | |
| Simon Glass | d8b771d | 2015-02-05 21:41:35 -0700 | [diff] [blame] | 129 | source "drivers/mtd/spi/Kconfig" |
| Heiko Schocher | 09dbb85 | 2016-09-21 07:58:19 +0200 | [diff] [blame] | 130 | |
| 131 | source "drivers/mtd/ubi/Kconfig" |
| Miquel Raynal | a4e7e21 | 2018-08-16 17:30:06 +0200 | [diff] [blame] | 132 | |
| 133 | endmenu |