Thomas Chou | fb798b1 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw> |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <dm.h> |
Mugunthan V N | 6f89d04 | 2016-01-16 21:33:58 +0530 | [diff] [blame] | 9 | #include <dm/lists.h> |
| 10 | #include <dm/device-internal.h> |
Philipp Tomsich | 617fd62 | 2017-09-11 22:04:10 +0200 | [diff] [blame] | 11 | #include <dm/root.h> |
Zakharov Vlad | 36901a4 | 2016-12-09 17:18:32 +0300 | [diff] [blame] | 12 | #include <clk.h> |
Thomas Chou | fb798b1 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 13 | #include <errno.h> |
| 14 | #include <timer.h> |
| 15 | |
Bin Meng | f786c64 | 2015-11-13 00:11:15 -0800 | [diff] [blame] | 16 | DECLARE_GLOBAL_DATA_PTR; |
| 17 | |
Thomas Chou | fb798b1 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 18 | /* |
Bin Meng | 8a7b864 | 2015-11-13 00:11:14 -0800 | [diff] [blame] | 19 | * Implement a timer uclass to work with lib/time.c. The timer is usually |
Bin Meng | ab841b6 | 2015-11-24 13:31:17 -0700 | [diff] [blame] | 20 | * a 32/64 bits free-running up counter. The get_rate() method is used to get |
Thomas Chou | fb798b1 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 21 | * the input clock frequency of the timer. The get_count() method is used |
Bin Meng | ab841b6 | 2015-11-24 13:31:17 -0700 | [diff] [blame] | 22 | * to get the current 64 bits count value. If the hardware is counting down, |
Thomas Chou | fb798b1 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 23 | * the value should be inversed inside the method. There may be no real |
| 24 | * tick, and no timer interrupt. |
| 25 | */ |
| 26 | |
Simon Glass | 04cb14c | 2016-02-24 09:14:48 -0700 | [diff] [blame] | 27 | int notrace timer_get_count(struct udevice *dev, u64 *count) |
Thomas Chou | fb798b1 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 28 | { |
| 29 | const struct timer_ops *ops = device_get_ops(dev); |
| 30 | |
| 31 | if (!ops->get_count) |
| 32 | return -ENOSYS; |
| 33 | |
| 34 | return ops->get_count(dev, count); |
| 35 | } |
| 36 | |
Simon Glass | 04cb14c | 2016-02-24 09:14:48 -0700 | [diff] [blame] | 37 | unsigned long notrace timer_get_rate(struct udevice *dev) |
Thomas Chou | fb798b1 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 38 | { |
Simon Glass | 04cb14c | 2016-02-24 09:14:48 -0700 | [diff] [blame] | 39 | struct timer_dev_priv *uc_priv = dev->uclass_priv; |
Thomas Chou | fb798b1 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 40 | |
| 41 | return uc_priv->clock_rate; |
| 42 | } |
| 43 | |
Bin Meng | f786c64 | 2015-11-13 00:11:15 -0800 | [diff] [blame] | 44 | static int timer_pre_probe(struct udevice *dev) |
| 45 | { |
Philipp Tomsich | 163796c | 2017-07-28 17:19:58 +0200 | [diff] [blame] | 46 | #if !CONFIG_IS_ENABLED(OF_PLATDATA) |
Bin Meng | f786c64 | 2015-11-13 00:11:15 -0800 | [diff] [blame] | 47 | struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev); |
Zakharov Vlad | 36901a4 | 2016-12-09 17:18:32 +0300 | [diff] [blame] | 48 | struct clk timer_clk; |
| 49 | int err; |
| 50 | ulong ret; |
Bin Meng | f786c64 | 2015-11-13 00:11:15 -0800 | [diff] [blame] | 51 | |
Zakharov Vlad | 36901a4 | 2016-12-09 17:18:32 +0300 | [diff] [blame] | 52 | err = clk_get_by_index(dev, 0, &timer_clk); |
| 53 | if (!err) { |
| 54 | ret = clk_get_rate(&timer_clk); |
| 55 | if (IS_ERR_VALUE(ret)) |
| 56 | return ret; |
| 57 | uc_priv->clock_rate = ret; |
Philipp Tomsich | 617fd62 | 2017-09-11 22:04:10 +0200 | [diff] [blame] | 58 | } else { |
| 59 | uc_priv->clock_rate = |
| 60 | dev_read_u32_default(dev, "clock-frequency", 0); |
| 61 | } |
Philipp Tomsich | 163796c | 2017-07-28 17:19:58 +0200 | [diff] [blame] | 62 | #endif |
Bin Meng | f786c64 | 2015-11-13 00:11:15 -0800 | [diff] [blame] | 63 | |
| 64 | return 0; |
| 65 | } |
| 66 | |
Stephen Warren | 023ddfe | 2016-01-06 10:33:03 -0700 | [diff] [blame] | 67 | static int timer_post_probe(struct udevice *dev) |
| 68 | { |
| 69 | struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev); |
| 70 | |
| 71 | if (!uc_priv->clock_rate) |
| 72 | return -EINVAL; |
| 73 | |
| 74 | return 0; |
| 75 | } |
| 76 | |
Bin Meng | ab841b6 | 2015-11-24 13:31:17 -0700 | [diff] [blame] | 77 | u64 timer_conv_64(u32 count) |
| 78 | { |
| 79 | /* increment tbh if tbl has rolled over */ |
| 80 | if (count < gd->timebase_l) |
| 81 | gd->timebase_h++; |
| 82 | gd->timebase_l = count; |
| 83 | return ((u64)gd->timebase_h << 32) | gd->timebase_l; |
| 84 | } |
| 85 | |
Mugunthan V N | 6f89d04 | 2016-01-16 21:33:58 +0530 | [diff] [blame] | 86 | int notrace dm_timer_init(void) |
| 87 | { |
Mugunthan V N | 6f89d04 | 2016-01-16 21:33:58 +0530 | [diff] [blame] | 88 | struct udevice *dev = NULL; |
Philipp Tomsich | 617fd62 | 2017-09-11 22:04:10 +0200 | [diff] [blame] | 89 | __maybe_unused ofnode node; |
Mugunthan V N | 6f89d04 | 2016-01-16 21:33:58 +0530 | [diff] [blame] | 90 | int ret; |
| 91 | |
| 92 | if (gd->timer) |
| 93 | return 0; |
| 94 | |
Philipp Tomsich | 63cf24a | 2017-09-11 22:04:11 +0200 | [diff] [blame] | 95 | /* |
| 96 | * Directly access gd->dm_root to suppress error messages, if the |
| 97 | * virtual root driver does not yet exist. |
| 98 | */ |
| 99 | if (gd->dm_root == NULL) |
| 100 | return -EAGAIN; |
| 101 | |
Philipp Tomsich | 163796c | 2017-07-28 17:19:58 +0200 | [diff] [blame] | 102 | #if !CONFIG_IS_ENABLED(OF_PLATDATA) |
Mugunthan V N | 6f89d04 | 2016-01-16 21:33:58 +0530 | [diff] [blame] | 103 | /* Check for a chosen timer to be used for tick */ |
Philipp Tomsich | 617fd62 | 2017-09-11 22:04:10 +0200 | [diff] [blame] | 104 | node = ofnode_get_chosen_node("tick-timer"); |
| 105 | |
| 106 | if (ofnode_valid(node) && |
| 107 | uclass_get_device_by_ofnode(UCLASS_TIMER, node, &dev)) { |
| 108 | /* |
| 109 | * If the timer is not marked to be bound before |
| 110 | * relocation, bind it anyway. |
| 111 | */ |
| 112 | if (!lists_bind_fdt(dm_root(), node, &dev)) { |
| 113 | ret = device_probe(dev); |
| 114 | if (ret) |
| 115 | return ret; |
| 116 | } |
| 117 | } |
Philipp Tomsich | 163796c | 2017-07-28 17:19:58 +0200 | [diff] [blame] | 118 | #endif |
Philipp Tomsich | 617fd62 | 2017-09-11 22:04:10 +0200 | [diff] [blame] | 119 | |
| 120 | if (!dev) { |
| 121 | /* Fall back to the first available timer */ |
Simon Glass | c7298e7 | 2016-02-11 13:23:26 -0700 | [diff] [blame] | 122 | ret = uclass_first_device_err(UCLASS_TIMER, &dev); |
Mugunthan V N | 6f89d04 | 2016-01-16 21:33:58 +0530 | [diff] [blame] | 123 | if (ret) |
| 124 | return ret; |
Mugunthan V N | 6f89d04 | 2016-01-16 21:33:58 +0530 | [diff] [blame] | 125 | } |
| 126 | |
| 127 | if (dev) { |
| 128 | gd->timer = dev; |
| 129 | return 0; |
| 130 | } |
| 131 | |
| 132 | return -ENODEV; |
| 133 | } |
| 134 | |
Thomas Chou | fb798b1 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 135 | UCLASS_DRIVER(timer) = { |
| 136 | .id = UCLASS_TIMER, |
| 137 | .name = "timer", |
Bin Meng | f786c64 | 2015-11-13 00:11:15 -0800 | [diff] [blame] | 138 | .pre_probe = timer_pre_probe, |
Mugunthan V N | 5d0f01f | 2015-12-24 16:08:06 +0530 | [diff] [blame] | 139 | .flags = DM_UC_FLAG_SEQ_ALIAS, |
Stephen Warren | 023ddfe | 2016-01-06 10:33:03 -0700 | [diff] [blame] | 140 | .post_probe = timer_post_probe, |
Thomas Chou | fb798b1 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 141 | .per_device_auto_alloc_size = sizeof(struct timer_dev_priv), |
| 142 | }; |