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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -05002/*
Kumar Galae727a362011-01-12 02:48:53 -06003 * Copyright 2007-2009, 2011 Freescale Semiconductor, Inc.
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -05004 */
5
Masahiro Yamadacd1b58e2014-04-28 10:17:10 +09006#include "config.h"
Kumar Galae727a362011-01-12 02:48:53 -06007
8#ifdef CONFIG_RESET_VECTOR_ADDRESS
9#define RESET_VECTOR_ADDRESS CONFIG_RESET_VECTOR_ADDRESS
10#else
Kumar Gala6472af82009-09-09 11:40:41 -050011#define RESET_VECTOR_ADDRESS 0xfffffffc
12#endif
13
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050014OUTPUT_ARCH(powerpc)
Pali Rohár3f9f1bd2022-04-03 00:05:09 +020015ENTRY(_start)
Peter Tyser1047c162010-09-29 14:05:56 -050016
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050017SECTIONS
18{
19 /* Read-only sections, merged into text segment: */
Pali Rohár18209f72022-06-16 14:19:44 +020020 .text :
Pali Rohárd61e3c22022-04-05 15:12:35 +020021 {
Tom Rini667dd4f2022-06-10 22:59:37 -040022#if CONFIG_IS_ENABLED(SYS_MPC85XX_NO_RESETVEC)
Pali Rohárd61e3c22022-04-05 15:12:35 +020023 KEEP(arch/powerpc/cpu/mpc85xx/start.o (.bootpg))
Pali Rohárd61e3c22022-04-05 15:12:35 +020024#endif
Peter Tyser1047c162010-09-29 14:05:56 -050025 *(.text*)
Pali Rohár18209f72022-06-16 14:19:44 +020026 }
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050027 _etext = .;
28 PROVIDE (etext = .);
29 .rodata :
30 {
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050031 *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
Pali Rohár18209f72022-06-16 14:19:44 +020032 }
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050033
34 /* Read-write section, merged into data segment: */
35 . = (. + 0x00FF) & 0xFFFFFF00;
36 _erotext = .;
37 PROVIDE (erotext = .);
38 .reloc :
39 {
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050040 _GOT2_TABLE_ = .;
Peter Tyser1047c162010-09-29 14:05:56 -050041 KEEP(*(.got2))
Joakim Tjernlund42126a62010-12-03 17:30:37 +010042 KEEP(*(.got))
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050043 _FIXUP_TABLE_ = .;
Peter Tyser1047c162010-09-29 14:05:56 -050044 KEEP(*(.fixup))
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050045 }
Joakim Tjernlund42126a62010-12-03 17:30:37 +010046 __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050047 __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
48
49 .data :
50 {
Peter Tyser1047c162010-09-29 14:05:56 -050051 *(.data*)
52 *(.sdata*)
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050053 }
54 _edata = .;
55 PROVIDE (edata = .);
56
57 . = .;
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050058
Marek Vasut607092a2012-10-12 10:27:03 +000059 . = ALIGN(4);
Andrew Scull5a9095c2022-05-30 10:00:04 +000060 __u_boot_list : {
61 KEEP(*(SORT(__u_boot_list*)));
Marek Vasut607092a2012-10-12 10:27:03 +000062 }
63
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050064 . = .;
65 __start___ex_table = .;
66 __ex_table : { *(__ex_table) }
67 __stop___ex_table = .;
68
Pali Rohár0486cb62022-04-05 15:12:30 +020069 . = ALIGN(4);
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050070 __init_begin = .;
71 .text.init : { *(.text.init) }
72 .data.init : { *(.data.init) }
Pali Rohár0486cb62022-04-05 15:12:30 +020073 . = ALIGN(4);
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050074 __init_end = .;
Jagdish Gediya910e1ae2018-09-03 21:35:05 +053075 _end = .;
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050076
Tom Rini667dd4f2022-06-10 22:59:37 -040077#if !CONFIG_IS_ENABLED(SYS_MPC85XX_NO_RESETVEC)
Kumar Gala6472af82009-09-09 11:40:41 -050078 .bootpg RESET_VECTOR_ADDRESS - 0xffc :
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050079 {
Stefan Roese88fbf932010-04-15 16:07:28 +020080 arch/powerpc/cpu/mpc85xx/start.o (.bootpg)
Pali Rohár18209f72022-06-16 14:19:44 +020081 } = 0xffff
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050082
Kumar Gala6472af82009-09-09 11:40:41 -050083 .resetvec RESET_VECTOR_ADDRESS :
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050084 {
Peter Tyser1047c162010-09-29 14:05:56 -050085 KEEP(*(.resetvec))
Pali Rohár18209f72022-06-16 14:19:44 +020086 } = 0xffff
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050087
Kumar Gala6472af82009-09-09 11:40:41 -050088 . = RESET_VECTOR_ADDRESS + 0x4;
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050089
Peter Tyser430445f2009-10-07 11:45:00 -050090 /*
91 * Make sure that the bss segment isn't linked at 0x0, otherwise its
92 * address won't be updated during relocation fixups. Note that
93 * this is a temporary fix. Code to dynamically the fixup the bss
94 * location will be added in the future. When the bss relocation
95 * fixup code is present this workaround should be removed.
96 */
97#if (RESET_VECTOR_ADDRESS == 0xfffffffc)
98 . |= 0x10;
99#endif
Ying Zhang0d4f5442013-05-20 14:07:23 +0800100#endif
Peter Tyser430445f2009-10-07 11:45:00 -0500101
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -0500102 __bss_start = .;
103 .bss (NOLOAD) :
104 {
Peter Tyser1047c162010-09-29 14:05:56 -0500105 *(.sbss*)
106 *(.bss*)
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -0500107 *(COMMON)
Pali Rohár18209f72022-06-16 14:19:44 +0200108 }
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -0500109
110 . = ALIGN(4);
Simon Glassed70c8f2013-03-14 06:54:53 +0000111 __bss_end = . ;
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -0500112 PROVIDE (end = .);
113}