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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
TsiChungLiew34674692007-08-16 13:20:50 -05002/*
3 * MCF5253 Internal Memory Map
4 *
5 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
6 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
TsiChungLiew34674692007-08-16 13:20:50 -05007 */
8
TsiChung Liew7f1a0462008-10-21 10:03:07 +00009#ifndef __IMMAP_5253__
10#define __IMMAP_5253__
TsiChungLiew34674692007-08-16 13:20:50 -050011
Tom Rini6a5dccc2022-11-16 13:10:41 -050012#define MMAP_INTC (CFG_SYS_MBAR + 0x00000040)
13#define MMAP_FBCS (CFG_SYS_MBAR + 0x00000080)
14#define MMAP_DTMR0 (CFG_SYS_MBAR + 0x00000140)
15#define MMAP_DTMR1 (CFG_SYS_MBAR + 0x00000180)
16#define MMAP_UART0 (CFG_SYS_MBAR + 0x000001C0)
17#define MMAP_UART1 (CFG_SYS_MBAR + 0x00000200)
18#define MMAP_I2C0 (CFG_SYS_MBAR + 0x00000280)
19#define MMAP_QSPI (CFG_SYS_MBAR + 0x00000400)
20#define MMAP_CAN0 (CFG_SYS_MBAR + 0x00010000)
21#define MMAP_CAN1 (CFG_SYS_MBAR + 0x00011000)
TsiChungLiew34674692007-08-16 13:20:50 -050022
Tom Rini6a5dccc2022-11-16 13:10:41 -050023#define MMAP_PAR (CFG_SYS_MBAR2 + 0x0000019C)
24#define MMAP_I2C1 (CFG_SYS_MBAR2 + 0x00000440)
25#define MMAP_UART2 (CFG_SYS_MBAR2 + 0x00000C00)
TsiChungLiew34674692007-08-16 13:20:50 -050026
TsiChung Liew7f1a0462008-10-21 10:03:07 +000027#include <asm/coldfire/ata.h>
28#include <asm/coldfire/flexbus.h>
29#include <asm/coldfire/flexcan.h>
30#include <asm/coldfire/qspi.h>
TsiChungLiew34674692007-08-16 13:20:50 -050031
TsiChung Liew7f1a0462008-10-21 10:03:07 +000032typedef struct canex_ctrl {
33 can_msg_t msg[32]; /* 0x80 Message Buffer 0-31 */
34} canex_t;
TsiChungLiew34674692007-08-16 13:20:50 -050035
TsiChung Liew7f1a0462008-10-21 10:03:07 +000036#endif /* __IMMAP_5253__ */