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git01.mediatek.com / filogic / uboot / fc28c5b196a663e273b4a92e34eb86f9582b0e75 / . / arch / arm / dts / rk3288-veyron-u-boot.dtsi
blob: ab564e73ed0003d2b0f78a6587f6835b4ad74734 [file] [log] [blame]
Walter Lozano6dc8d7e2020-06-25 01:10:15 -0300[diff] [blame]1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright 2015 Google, Inc
4 */
5
6#include "rk3288-u-boot.dtsi"
7
Johan Jonker8ba3d4062022-04-15 23:21:39 +0200[diff] [blame]8/ {
9 chosen {
10 u-boot,spl-boot-order = &spi_flash;
11 };
12};
13
14&dmc {
15 logic-supply = <&vdd_logic>;
16 rockchip,odt-disable-freq = <333000000>;
17 rockchip,dll-disable-freq = <333000000>;
18 rockchip,sr-enable-freq = <333000000>;
19 rockchip,pd-enable-freq = <666000000>;
20 rockchip,auto-self-refresh-cnt = <0>;
21 rockchip,auto-power-down-cnt = <64>;
22 rockchip,ddr-speed-bin = <21>;
23 rockchip,trcd = <10>;
24 rockchip,trp = <10>;
25 operating-points = <
26 /* KHz uV */
27 200000 1050000
28 333000 1100000
29 533000 1150000
30 666000 1200000
31 >;
32};
33
34&gpio3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]35 bootph-all;
Johan Jonker8ba3d4062022-04-15 23:21:39 +0200[diff] [blame]36};
37
Walter Lozano6dc8d7e2020-06-25 01:10:15 -0300[diff] [blame]38&gpio7 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]39 bootph-all;
Walter Lozano6dc8d7e2020-06-25 01:10:15 -0300[diff] [blame]40};
41
Johan Jonker8ba3d4062022-04-15 23:21:39 +0200[diff] [blame]42&gpio8 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]43 bootph-all;
Johan Jonker8ba3d4062022-04-15 23:21:39 +0200[diff] [blame]44};
45
46&i2c0 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]47 bootph-all;
Johan Jonker8ba3d4062022-04-15 23:21:39 +0200[diff] [blame]48};
49
50&pinctrl {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]51 bootph-all;
Johan Jonker8ba3d4062022-04-15 23:21:39 +0200[diff] [blame]52};
53
54&rk808 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]55 bootph-all;
Johan Jonker8ba3d4062022-04-15 23:21:39 +0200[diff] [blame]56};
57
58&sdmmc {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]59 bootph-all;
Johan Jonker8ba3d4062022-04-15 23:21:39 +0200[diff] [blame]60};
61
62&spi2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]63 bootph-all;
Johan Jonker8ba3d4062022-04-15 23:21:39 +0200[diff] [blame]64};
65
66&spi_flash {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]67 bootph-all;
Johan Jonker8ba3d4062022-04-15 23:21:39 +0200[diff] [blame]68};
69
70&uart2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]71 bootph-all;
Johan Jonker8ba3d4062022-04-15 23:21:39 +0200[diff] [blame]72};