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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Hans de Goede663ae652016-08-19 15:25:41 +02002/*
3 * (C) Copyright 2016 Hans de Goede <hdegoede@redhat.com>
Hans de Goede663ae652016-08-19 15:25:41 +02004 */
5
6#ifndef _SUNXI_PWM_H
7#define _SUNXI_PWM_H
8
Simon Glass4dcacfc2020-05-10 11:40:13 -06009#ifndef __ASSEMBLY__
10#include <linux/bitops.h>
11#endif
12
Hans de Goede663ae652016-08-19 15:25:41 +020013#define SUNXI_PWM_CTRL_REG (SUNXI_PWM_BASE + 0)
14#define SUNXI_PWM_CH0_PERIOD (SUNXI_PWM_BASE + 4)
15
16#define SUNXI_PWM_CTRL_PRESCALE0(x) ((x) & 0xf)
Vasily Khoruzhick86a38e52018-05-14 08:16:20 -070017#define SUNXI_PWM_CTRL_PRESCALE0_MASK 0xf
Hans de Goede663ae652016-08-19 15:25:41 +020018#define SUNXI_PWM_CTRL_ENABLE0 (0x5 << 4)
19#define SUNXI_PWM_CTRL_POLARITY0(x) ((x) << 5)
Vasily Khoruzhick86a38e52018-05-14 08:16:20 -070020#define SUNXI_PWM_CTRL_CH0_ACT_STA BIT(5)
21#define SUNXI_PWM_CTRL_CLK_GATE BIT(6)
22
23#define SUNXI_PWM_CH0_PERIOD_MAX (0xffff)
24#define SUNXI_PWM_CH0_PERIOD_PRD(x) ((x & 0xffff) << 16)
25#define SUNXI_PWM_CH0_PERIOD_DUTY(x) ((x) & 0xffff)
Hans de Goede663ae652016-08-19 15:25:41 +020026
27#define SUNXI_PWM_PERIOD_80PCT 0x04af03c0
28
29#if defined CONFIG_MACH_SUN4I || defined CONFIG_MACH_SUN5I
30#define SUNXI_PWM_PIN0 SUNXI_GPB(2)
31#define SUNXI_PWM_MUX SUN4I_GPB_PWM
32#endif
33
34#if defined CONFIG_MACH_SUN6I
35#define SUNXI_PWM_PIN0 SUNXI_GPH(13)
36#define SUNXI_PWM_MUX SUN6I_GPH_PWM
37#endif
38
39#if defined CONFIG_MACH_SUN8I_A23 || defined CONFIG_MACH_SUN8I_A33
40#define SUNXI_PWM_PIN0 SUNXI_GPH(0)
41#define SUNXI_PWM_MUX SUN8I_GPH_PWM
42#endif
43
Vasily Khoruzhick86a38e52018-05-14 08:16:20 -070044struct sunxi_pwm {
45 u32 ctrl;
46 u32 ch0_period;
47};
48
Hans de Goede663ae652016-08-19 15:25:41 +020049#endif