blob: 4c060ee0e0ad13b411cffc6d38ae392dd0cf1de6 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0 */
Simon Glassb37e8152014-06-02 22:04:55 -06002/*
3 * This header provides constants for OMAP pinctrl bindings.
4 *
5 * Copyright (C) 2009 Nokia
6 * Copyright (C) 2009-2010 Texas Instruments
Simon Glassb37e8152014-06-02 22:04:55 -06007 */
8
9#ifndef _DT_BINDINGS_PINCTRL_OMAP_H
10#define _DT_BINDINGS_PINCTRL_OMAP_H
11
12/* 34xx mux mode options for each pin. See TRM for options */
13#define MUX_MODE0 0
14#define MUX_MODE1 1
15#define MUX_MODE2 2
16#define MUX_MODE3 3
17#define MUX_MODE4 4
18#define MUX_MODE5 5
19#define MUX_MODE6 6
20#define MUX_MODE7 7
21
22/* 24xx/34xx mux bit defines */
23#define PULL_ENA (1 << 3)
24#define PULL_UP (1 << 4)
25#define ALTELECTRICALSEL (1 << 5)
26
Paul Barker19bc6d42021-07-12 21:14:08 +010027/* omap3/4/5 specific mux bit defines */
Simon Glassb37e8152014-06-02 22:04:55 -060028#define INPUT_EN (1 << 8)
29#define OFF_EN (1 << 9)
30#define OFFOUT_EN (1 << 10)
31#define OFFOUT_VAL (1 << 11)
32#define OFF_PULL_EN (1 << 12)
33#define OFF_PULL_UP (1 << 13)
34#define WAKEUP_EN (1 << 14)
Simon Glassb37e8152014-06-02 22:04:55 -060035#define WAKEUP_EVENT (1 << 15)
36
37/* Active pin states */
38#define PIN_OUTPUT 0
39#define PIN_OUTPUT_PULLUP (PIN_OUTPUT | PULL_ENA | PULL_UP)
40#define PIN_OUTPUT_PULLDOWN (PIN_OUTPUT | PULL_ENA)
41#define PIN_INPUT INPUT_EN
42#define PIN_INPUT_PULLUP (PULL_ENA | INPUT_EN | PULL_UP)
43#define PIN_INPUT_PULLDOWN (PULL_ENA | INPUT_EN)
44
45/* Off mode states */
46#define PIN_OFF_NONE 0
47#define PIN_OFF_OUTPUT_HIGH (OFF_EN | OFFOUT_EN | OFFOUT_VAL)
48#define PIN_OFF_OUTPUT_LOW (OFF_EN | OFFOUT_EN)
Paul Barker19bc6d42021-07-12 21:14:08 +010049#define PIN_OFF_INPUT_PULLUP (OFF_EN | OFFOUT_EN | OFF_PULL_EN | OFF_PULL_UP)
50#define PIN_OFF_INPUT_PULLDOWN (OFF_EN | OFFOUT_EN | OFF_PULL_EN)
Simon Glassb37e8152014-06-02 22:04:55 -060051#define PIN_OFF_WAKEUPENABLE WAKEUP_EN
52
Lokesh Vutla5a954ba2016-05-16 11:24:28 +053053/*
54 * Macros to allow using the absolute physical address instead of the
55 * padconf registers instead of the offset from padconf base.
56 */
57#define OMAP_IOPAD_OFFSET(pa, offset) (((pa) & 0xffff) - (offset))
58
59#define OMAP2420_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0030) (val)
60#define OMAP2430_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2030) (val)
61#define OMAP3_CORE1_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2030) (val)
62#define OMAP3430_CORE2_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x25d8) (val)
63#define OMAP3630_CORE2_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x25a0) (val)
64#define OMAP3_WKUP_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2a00) (val)
65#define DM814X_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
66#define DM816X_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
Paul Barker19bc6d42021-07-12 21:14:08 +010067#define AM33XX_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val) (0)
68#define AM33XX_PADCONF(pa, conf, mux) OMAP_IOPAD_OFFSET((pa), 0x0800) (conf) (mux)
Lokesh Vutla5a954ba2016-05-16 11:24:28 +053069
70/*
71 * Macros to allow using the offset from the padconf physical address
72 * instead of the offset from padconf base.
73 */
74#define OMAP_PADCONF_OFFSET(offset, base_offset) ((offset) - (base_offset))
75
76#define OMAP4_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val)
77#define OMAP5_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val)
78
79/*
80 * Define some commonly used pins configured by the boards.
81 * Note that some boards use alternative pins, so check
82 * the schematics before using these.
83 */
84#define OMAP3_UART1_RX 0x152
85#define OMAP3_UART2_RX 0x14a
86#define OMAP3_UART3_RX 0x16e
87#define OMAP4_UART2_RX 0xdc
88#define OMAP4_UART3_RX 0x104
89#define OMAP4_UART4_RX 0x11c
90
Simon Glassb37e8152014-06-02 22:04:55 -060091#endif