Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Asen Dimov | ddd0bda | 2010-04-20 22:49:04 +0300 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2010 |
| 4 | * Ilko Iliev <iliev@ronetix.at> |
| 5 | * Asen Dimov <dimov@ronetix.at> |
| 6 | * Ronetix GmbH <www.ronetix.at> |
| 7 | * |
| 8 | * (C) Copyright 2007-2008 |
Stelian Pop | 5ee0c7f | 2011-11-01 00:00:39 +0100 | [diff] [blame] | 9 | * Stelian Pop <stelian@popies.net> |
Asen Dimov | ddd0bda | 2010-04-20 22:49:04 +0300 | [diff] [blame] | 10 | * Lead Tech Design <www.leadtechdesign.com> |
Asen Dimov | ddd0bda | 2010-04-20 22:49:04 +0300 | [diff] [blame] | 11 | */ |
| 12 | |
| 13 | #include <common.h> |
Simon Glass | 8e16b1e | 2019-12-28 10:45:05 -0700 | [diff] [blame] | 14 | #include <init.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 15 | #include <asm/global_data.h> |
Alexey Brodkin | 267d8e2 | 2014-02-26 17:47:58 +0400 | [diff] [blame] | 16 | #include <linux/sizes.h> |
Asen Dimov | a1e4e2b | 2011-06-08 22:01:37 +0000 | [diff] [blame] | 17 | #include <asm/io.h> |
Andreas Bießmann | a4c24d3 | 2013-11-29 12:13:45 +0100 | [diff] [blame] | 18 | #include <asm/gpio.h> |
Asen Dimov | ddd0bda | 2010-04-20 22:49:04 +0300 | [diff] [blame] | 19 | #include <asm/arch/at91sam9_smc.h> |
| 20 | #include <asm/arch/at91_common.h> |
Asen Dimov | ddd0bda | 2010-04-20 22:49:04 +0300 | [diff] [blame] | 21 | #include <asm/arch/at91_rstc.h> |
| 22 | #include <asm/arch/at91_matrix.h> |
Asen Dimov | a1e4e2b | 2011-06-08 22:01:37 +0000 | [diff] [blame] | 23 | #include <asm/arch/gpio.h> |
Asen Dimov | ddd0bda | 2010-04-20 22:49:04 +0300 | [diff] [blame] | 24 | #include <asm/arch/clk.h> |
Asen Dimov | ddd0bda | 2010-04-20 22:49:04 +0300 | [diff] [blame] | 25 | #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) |
| 26 | #include <net.h> |
| 27 | #endif |
| 28 | #include <netdev.h> |
Simon Glass | 0ffb9d6 | 2017-05-31 19:47:48 -0600 | [diff] [blame] | 29 | #include <asm/mach-types.h> |
Asen Dimov | ddd0bda | 2010-04-20 22:49:04 +0300 | [diff] [blame] | 30 | |
| 31 | DECLARE_GLOBAL_DATA_PTR; |
| 32 | |
| 33 | /* |
| 34 | * Miscelaneous platform dependent initialisations |
| 35 | */ |
| 36 | |
| 37 | #ifdef CONFIG_CMD_NAND |
| 38 | static void pm9g45_nand_hw_init(void) |
| 39 | { |
| 40 | unsigned long csa; |
Asen Dimov | a1e4e2b | 2011-06-08 22:01:37 +0000 | [diff] [blame] | 41 | struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; |
| 42 | struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; |
Asen Dimov | ddd0bda | 2010-04-20 22:49:04 +0300 | [diff] [blame] | 43 | |
| 44 | /* Enable CS3 */ |
| 45 | csa = readl(&matrix->ccr[6]) | AT91_MATRIX_CSA_EBI_CS3A; |
| 46 | writel(csa, &matrix->ccr[6]); |
| 47 | |
| 48 | /* Configure SMC CS3 for NAND/SmartMedia */ |
| 49 | writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) | |
| 50 | AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0), |
| 51 | &smc->cs[3].setup); |
| 52 | |
| 53 | writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(3) | |
| 54 | AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(2), |
| 55 | &smc->cs[3].pulse); |
| 56 | |
| 57 | writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(4), |
| 58 | &smc->cs[3].cycle); |
| 59 | |
| 60 | writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | |
| 61 | AT91_SMC_MODE_EXNW_DISABLE | |
| 62 | AT91_SMC_MODE_DBW_8 | |
| 63 | AT91_SMC_MODE_TDF_CYCLE(3), |
| 64 | &smc->cs[3].mode); |
| 65 | |
Wenyou Yang | 78f8976 | 2016-02-03 10:16:50 +0800 | [diff] [blame] | 66 | at91_periph_clk_enable(ATMEL_ID_PIOC); |
Asen Dimov | ddd0bda | 2010-04-20 22:49:04 +0300 | [diff] [blame] | 67 | |
Tom Rini | b421349 | 2022-11-12 17:36:51 -0500 | [diff] [blame] | 68 | #ifdef CFG_SYS_NAND_READY_PIN |
Asen Dimov | ddd0bda | 2010-04-20 22:49:04 +0300 | [diff] [blame] | 69 | /* Configure RDY/BSY */ |
Ilko Iliev | 71e435d | 2023-06-13 17:09:58 +0200 | [diff] [blame] | 70 | gpio_request(CFG_SYS_NAND_READY_PIN, "NAND RDY/BSY"); |
Tom Rini | b421349 | 2022-11-12 17:36:51 -0500 | [diff] [blame] | 71 | gpio_direction_input(CFG_SYS_NAND_READY_PIN); |
Asen Dimov | ddd0bda | 2010-04-20 22:49:04 +0300 | [diff] [blame] | 72 | #endif |
| 73 | |
| 74 | /* Enable NandFlash */ |
Ilko Iliev | 71e435d | 2023-06-13 17:09:58 +0200 | [diff] [blame] | 75 | gpio_request(CFG_SYS_NAND_ENABLE_PIN, "NAND enable"); |
Tom Rini | b421349 | 2022-11-12 17:36:51 -0500 | [diff] [blame] | 76 | gpio_direction_output(CFG_SYS_NAND_ENABLE_PIN, 1); |
Asen Dimov | ddd0bda | 2010-04-20 22:49:04 +0300 | [diff] [blame] | 77 | } |
| 78 | #endif |
| 79 | |
| 80 | #ifdef CONFIG_MACB |
| 81 | static void pm9g45_macb_hw_init(void) |
| 82 | { |
Asen Dimov | ddd0bda | 2010-04-20 22:49:04 +0300 | [diff] [blame] | 83 | /* |
| 84 | * PD2 enables the 50MHz oscillator for Ethernet PHY |
| 85 | * 1 - enable |
| 86 | * 0 - disable |
| 87 | */ |
| 88 | at91_set_pio_output(AT91_PIO_PORTD, 2, 1); |
| 89 | at91_set_pio_value(AT91_PIO_PORTD, 2, 1); /* 1- enable, 0 - disable */ |
| 90 | |
Wenyou Yang | 78f8976 | 2016-02-03 10:16:50 +0800 | [diff] [blame] | 91 | at91_periph_clk_enable(ATMEL_ID_EMAC); |
Asen Dimov | ddd0bda | 2010-04-20 22:49:04 +0300 | [diff] [blame] | 92 | |
| 93 | /* |
| 94 | * Disable pull-up on: |
| 95 | * RXDV (PA15) => PHY normal mode (not Test mode) |
| 96 | * ERX0 (PA12) => PHY ADDR0 |
| 97 | * ERX1 (PA13) => PHY ADDR1 => PHYADDR = 0x0 |
| 98 | * |
| 99 | * PHY has internal pull-down |
| 100 | */ |
| 101 | at91_set_pio_pullup(AT91_PIO_PORTA, 15, 0); |
| 102 | at91_set_pio_pullup(AT91_PIO_PORTA, 12, 0); |
| 103 | at91_set_pio_pullup(AT91_PIO_PORTA, 13, 0); |
| 104 | |
| 105 | /* Re-enable pull-up */ |
| 106 | at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1); |
| 107 | at91_set_pio_pullup(AT91_PIO_PORTA, 12, 1); |
| 108 | at91_set_pio_pullup(AT91_PIO_PORTA, 13, 1); |
| 109 | |
| 110 | at91_macb_hw_init(); |
| 111 | } |
| 112 | #endif |
| 113 | |
Asen Dimov | a04fad9 | 2011-12-09 11:00:07 +0000 | [diff] [blame] | 114 | int board_early_init_f(void) |
Asen Dimov | ddd0bda | 2010-04-20 22:49:04 +0300 | [diff] [blame] | 115 | { |
Wenyou Yang | 78f8976 | 2016-02-03 10:16:50 +0800 | [diff] [blame] | 116 | at91_periph_clk_enable(ATMEL_ID_PIOA); |
| 117 | at91_periph_clk_enable(ATMEL_ID_PIOB); |
| 118 | at91_periph_clk_enable(ATMEL_ID_PIOC); |
| 119 | at91_periph_clk_enable(ATMEL_ID_PIODE); |
Asen Dimov | ddd0bda | 2010-04-20 22:49:04 +0300 | [diff] [blame] | 120 | |
Asen Dimov | a04fad9 | 2011-12-09 11:00:07 +0000 | [diff] [blame] | 121 | at91_seriald_hw_init(); |
| 122 | |
| 123 | return 0; |
| 124 | } |
| 125 | |
| 126 | int board_init(void) |
| 127 | { |
| 128 | /* arch number of AT91SAM9M10G45EK-Board */ |
| 129 | gd->bd->bi_arch_number = MACH_TYPE_PM9G45; |
Asen Dimov | ddd0bda | 2010-04-20 22:49:04 +0300 | [diff] [blame] | 130 | /* adress of boot parameters */ |
Tom Rini | bb4dd96 | 2022-11-16 13:10:37 -0500 | [diff] [blame] | 131 | gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100; |
Asen Dimov | ddd0bda | 2010-04-20 22:49:04 +0300 | [diff] [blame] | 132 | |
Asen Dimov | ddd0bda | 2010-04-20 22:49:04 +0300 | [diff] [blame] | 133 | #ifdef CONFIG_CMD_NAND |
| 134 | pm9g45_nand_hw_init(); |
| 135 | #endif |
| 136 | |
| 137 | #ifdef CONFIG_MACB |
| 138 | pm9g45_macb_hw_init(); |
| 139 | #endif |
| 140 | return 0; |
| 141 | } |
| 142 | |
| 143 | int dram_init(void) |
| 144 | { |
Asen Dimov | 8322d4e | 2010-12-12 00:42:28 +0000 | [diff] [blame] | 145 | /* dram_init must store complete ramsize in gd->ram_size */ |
Tom Rini | bb4dd96 | 2022-11-16 13:10:37 -0500 | [diff] [blame] | 146 | gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE, |
| 147 | CFG_SYS_SDRAM_SIZE); |
Asen Dimov | 8322d4e | 2010-12-12 00:42:28 +0000 | [diff] [blame] | 148 | return 0; |
| 149 | } |
| 150 | |
Simon Glass | 2f949c3 | 2017-03-31 08:40:32 -0600 | [diff] [blame] | 151 | int dram_init_banksize(void) |
Asen Dimov | 8322d4e | 2010-12-12 00:42:28 +0000 | [diff] [blame] | 152 | { |
Tom Rini | bb4dd96 | 2022-11-16 13:10:37 -0500 | [diff] [blame] | 153 | gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE; |
| 154 | gd->bd->bi_dram[0].size = CFG_SYS_SDRAM_SIZE; |
Simon Glass | 2f949c3 | 2017-03-31 08:40:32 -0600 | [diff] [blame] | 155 | |
| 156 | return 0; |
Asen Dimov | ddd0bda | 2010-04-20 22:49:04 +0300 | [diff] [blame] | 157 | } |
| 158 | |
| 159 | #ifdef CONFIG_RESET_PHY_R |
| 160 | void reset_phy(void) |
| 161 | { |
| 162 | #ifdef CONFIG_MACB |
| 163 | /* |
| 164 | * Initialize ethernet HW addr prior to starting Linux, |
| 165 | * needed for nfsroot |
| 166 | */ |
Joe Hershberger | 3dbe17e | 2015-03-22 17:09:06 -0500 | [diff] [blame] | 167 | eth_init(); |
Asen Dimov | ddd0bda | 2010-04-20 22:49:04 +0300 | [diff] [blame] | 168 | #endif |
| 169 | } |
| 170 | #endif |
| 171 | |
Masahiro Yamada | f7ed78b | 2020-06-26 15:13:33 +0900 | [diff] [blame] | 172 | int board_eth_init(struct bd_info *bis) |
Asen Dimov | ddd0bda | 2010-04-20 22:49:04 +0300 | [diff] [blame] | 173 | { |
| 174 | int rc = 0; |
| 175 | #ifdef CONFIG_MACB |
Asen Dimov | a1e4e2b | 2011-06-08 22:01:37 +0000 | [diff] [blame] | 176 | rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x01); |
Asen Dimov | ddd0bda | 2010-04-20 22:49:04 +0300 | [diff] [blame] | 177 | #endif |
| 178 | return rc; |
| 179 | } |