blob: 41c7b9b2d1b7624aba3c0fa4f95ea577955249a8 [file] [log] [blame]
Angelo Dureghelloc6164c92019-03-13 21:46:41 +01001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
4 */
5
6/ {
7 compatible = "fsl,mcf523x";
8
9 aliases {
10 serial0 = &uart0;
Angelo Durgehelloc6e17f92019-11-15 23:54:12 +010011 fec0 = &fec0;
Angelo Dureghelloc6164c92019-03-13 21:46:41 +010012 };
13
14 soc {
15 compatible = "simple-bus";
16 #address-cells = <1>;
17 #size-cells = <1>;
18
19 ipsbar: ipsbar@4000000 {
20 compatible = "simple-bus";
21 #address-cells = <1>;
22 #size-cells = <1>;
23 ranges = <0x00000000 0x40000000 0x40000000>;
24 reg = <0x40000000 0x40000000>;
25
26 uart0: uart@200 {
27 compatible = "fsl,mcf-uart";
28 reg = <0x200 0x40>;
29 status = "disabled";
30 };
31
32 uart1: uart@240 {
33 compatible = "fsl,mcf-uart";
34 reg = <0x240 0x40>;
35 status = "disabled";
36 };
37
38 uart2: uart@280 {
39 compatible = "fsl,mcf-uart";
40 reg = <0x280 0x40>;
41 status = "disabled";
42 };
Angelo Durgehelloc6e17f92019-11-15 23:54:12 +010043
44 fec0: ethernet@1000 {
45 compatible = "fsl,mcf-fec";
46 #address-cells=<2>;
47 #size-cells=<1>;
48 reg = <0x1000 0x400>;
49 mii-base = <0>;
50 max-speed = <100>;
51 timeout-loop = <50000>;
52 status = "disabled";
53 };
Angelo Dureghellod768df12023-04-05 00:59:27 +020054
55 i2c0: i2c@300 {
56 compatible = "fsl-i2c";
57 #address-cells=<1>;
58 #size-cells=<0>;
59 cell-index = <0>;
60 reg = <0x300 0x14>;
61 clock-frequency = <100000>;
62 status = "disabled";
63 };
Angelo Dureghelloc6164c92019-03-13 21:46:41 +010064 };
65 };
66};