blob: e8772d3a38247966711b34c0267caf12fa5a0ad5 [file] [log] [blame]
Jagan Teki8967dea2023-01-30 20:27:45 +05301// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2021 Rockchip Electronics Co., Ltd
4 */
5
6#include <common.h>
7#include <dm.h>
8#include <syscon.h>
9#include <asm/arch-rockchip/clock.h>
10
11static const struct udevice_id rk3588_syscon_ids[] = {
12 { .compatible = "rockchip,rk3588-sys-grf", .data = ROCKCHIP_SYSCON_GRF },
13 { .compatible = "rockchip,rk3588-pmu1-grf", .data = ROCKCHIP_SYSCON_PMUGRF },
14 { .compatible = "rockchip,rk3588-vop-grf", .data = ROCKCHIP_SYSCON_VOP_GRF },
15 { .compatible = "rockchip,rk3588-vo-grf", .data = ROCKCHIP_SYSCON_VO_GRF },
16 { .compatible = "rockchip,pcie30-phy-grf", .data = ROCKCHIP_SYSCON_PCIE30_PHY_GRF },
17 { .compatible = "rockchip,rk3588-php-grf", .data = ROCKCHIP_SYSCON_PHP_GRF },
18 { .compatible = "rockchip,pipe-phy-grf", .data = ROCKCHIP_SYSCON_PIPE_PHY0_GRF },
19 { .compatible = "rockchip,pipe-phy-grf", .data = ROCKCHIP_SYSCON_PIPE_PHY1_GRF },
20 { .compatible = "rockchip,pipe-phy-grf", .data = ROCKCHIP_SYSCON_PIPE_PHY2_GRF },
21 { .compatible = "rockchip,rk3588-pmu", .data = ROCKCHIP_SYSCON_PMU },
22 { }
23};
24
25U_BOOT_DRIVER(syscon_rk3588) = {
26 .name = "rk3588_syscon",
27 .id = UCLASS_SYSCON,
28 .of_match = rk3588_syscon_ids,
29#if CONFIG_IS_ENABLED(OF_REAL)
30 .bind = dm_scan_fdt_dev,
31#endif
32};