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git01.mediatek.com / filogic / uboot / fbe7d703e973553af0d021a532fbd25dbf62c96c / . / configs / evb-px5_defconfig
blob: 2d18da6cc8cac4b0d7080f21acf0a395f2d25578 [file] [log] [blame]
Andy Yanad63aac2017-05-15 17:54:48 +0800[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_ROCKCHIP=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]3CONFIG_SYS_TEXT_BASE=0x00200000
Andy Yanad63aac2017-05-15 17:54:48 +0800[diff] [blame]4CONFIG_ROCKCHIP_RK3368=y
Tom Rini28862bf2019-11-21 08:30:45 -0500[diff] [blame]5CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
Kever Yang38dc38b2019-02-12 15:19:07 +0800[diff] [blame]6CONFIG_TPL_LIBCOMMON_SUPPORT=y
7CONFIG_TPL_LIBGENERIC_SUPPORT=y
8CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
Andy Yanad63aac2017-05-15 17:54:48 +0800[diff] [blame]9CONFIG_TARGET_EVB_PX5=y
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]10CONFIG_ENV_OFFSET=0x3F8000
Kever Yang38dc38b2019-02-12 15:19:07 +0800[diff] [blame]11CONFIG_SPL_STACK_R_ADDR=0x600000
Tom Rinifdc7e362019-11-11 20:04:24 -0500[diff] [blame]12CONFIG_NR_DRAM_BANKS=1
Kever Yang38dc38b2019-02-12 15:19:07 +0800[diff] [blame]13CONFIG_SPL=y
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]14CONFIG_DEBUG_UART_BASE=0xFF1c0000
15CONFIG_DEBUG_UART_CLOCK=24000000
Kever Yang38dc38b2019-02-12 15:19:07 +0800[diff] [blame]16CONFIG_SPL_SPI_FLASH_SUPPORT=y
17CONFIG_SPL_SPI_SUPPORT=y
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]18CONFIG_DEBUG_UART=y
Tom Rini61c41ac2017-09-08 10:14:49 -0400[diff] [blame]19CONFIG_ANDROID_BOOT_IMAGE=y
Kever Yang38dc38b2019-02-12 15:19:07 +0800[diff] [blame]20CONFIG_FIT=y
21CONFIG_FIT_VERBOSE=y
22CONFIG_SPL_LOAD_FIT=y
Kever Yang38dc38b2019-02-12 15:19:07 +0800[diff] [blame]23CONFIG_BOOTSTAGE=y
24CONFIG_SPL_BOOTSTAGE=y
25CONFIG_BOOTSTAGE_REPORT=y
26CONFIG_BOOTSTAGE_FDT=y
Klaus Goger2b6b4f22018-05-25 23:45:05 +0200[diff] [blame]27CONFIG_DEFAULT_FDT_FILE="rockchip/rk3368-px5-evb.dtb"
Andy Yanad63aac2017-05-15 17:54:48 +0800[diff] [blame]28# CONFIG_DISPLAY_CPUINFO is not set
Mario Sixf7055442018-03-28 14:38:17 +0200[diff] [blame]29CONFIG_DISPLAY_BOARDINFO_LATE=y
Andy Yanad63aac2017-05-15 17:54:48 +0800[diff] [blame]30CONFIG_ARCH_EARLY_INIT_R=y
Kever Yang38dc38b2019-02-12 15:19:07 +0800[diff] [blame]31CONFIG_SPL_BOOTROM_SUPPORT=y
Kever Yang69a74a52019-08-20 11:47:01 +0800[diff] [blame]32# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
Kever Yang38dc38b2019-02-12 15:19:07 +0800[diff] [blame]33CONFIG_TPL_SYS_MALLOC_SIMPLE=y
34CONFIG_SPL_STACK_R=y
35CONFIG_SPL_ATF=y
36CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
37CONFIG_TPL=y
Andy Yanad63aac2017-05-15 17:54:48 +0800[diff] [blame]38CONFIG_CMD_MMC=y
39CONFIG_CMD_CACHE=y
Kever Yang38dc38b2019-02-12 15:19:07 +0800[diff] [blame]40CONFIG_SPL_OF_CONTROL=y
41CONFIG_TPL_OF_CONTROL=y
42CONFIG_OF_LIVE=y
Tom Rini74060322018-09-03 15:26:12 -0400[diff] [blame]43CONFIG_DEFAULT_DEVICE_TREE="rk3368-px5-evb"
Kever Yang38dc38b2019-02-12 15:19:07 +0800[diff] [blame]44CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent"
45CONFIG_TPL_OF_PLATDATA=y
46CONFIG_ENV_IS_IN_MMC=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]47CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Andy Yanfbe7d702019-11-26 21:15:40 +0800[diff] [blame^]48# CONFIG_NET is not set
Kever Yang38dc38b2019-02-12 15:19:07 +0800[diff] [blame]49CONFIG_TPL_DM=y
Andy Yanad63aac2017-05-15 17:54:48 +0800[diff] [blame]50CONFIG_REGMAP=y
Kever Yang38dc38b2019-02-12 15:19:07 +0800[diff] [blame]51CONFIG_SPL_REGMAP=y
52CONFIG_TPL_REGMAP=y
Andy Yanad63aac2017-05-15 17:54:48 +0800[diff] [blame]53CONFIG_SYSCON=y
Kever Yang38dc38b2019-02-12 15:19:07 +0800[diff] [blame]54CONFIG_SPL_SYSCON=y
55CONFIG_TPL_SYSCON=y
Andy Yanad63aac2017-05-15 17:54:48 +0800[diff] [blame]56CONFIG_CLK=y
Kever Yang38dc38b2019-02-12 15:19:07 +0800[diff] [blame]57CONFIG_SPL_CLK=y
58CONFIG_TPL_CLK=y
Andy Yanad63aac2017-05-15 17:54:48 +0800[diff] [blame]59CONFIG_MMC_DW=y
60CONFIG_MMC_DW_ROCKCHIP=y
61CONFIG_PINCTRL=y
Kever Yang38dc38b2019-02-12 15:19:07 +0800[diff] [blame]62CONFIG_SPL_PINCTRL=y
Andy Yanad63aac2017-05-15 17:54:48 +0800[diff] [blame]63CONFIG_RAM=y
Kever Yang38dc38b2019-02-12 15:19:07 +0800[diff] [blame]64CONFIG_SPL_RAM=y
65CONFIG_TPL_RAM=y
66CONFIG_DM_RESET=y
Andy Yanad63aac2017-05-15 17:54:48 +0800[diff] [blame]67CONFIG_DEBUG_UART_SHIFT=2
Andy Yanad63aac2017-05-15 17:54:48 +0800[diff] [blame]68CONFIG_DEBUG_UART_SKIP_INIT=y
69CONFIG_SYSRESET=y
Kever Yang38dc38b2019-02-12 15:19:07 +0800[diff] [blame]70CONFIG_PANIC_HANG=y
71CONFIG_SPL_TINY_MEMSET=y
72CONFIG_TPL_TINY_MEMSET=y
Andy Yanad63aac2017-05-15 17:54:48 +0800[diff] [blame]73CONFIG_ERRNO_STR=y