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git01.mediatek.com / filogic / uboot / fbdb93c301c5098ea537dcc51703edb5cf8d7a17 / . / configs / silk_defconfig
blob: 70500cf08140fe78db7f5baf0ff80e8378b56e7d [file] [log] [blame]
Vladimir Barinovc8c1a3e2015-01-12 19:17:07 +0300[diff] [blame]1CONFIG_ARM=y
Marek Vasut52e0ee32018-04-21 16:19:56 +0200[diff] [blame]2CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
3# CONFIG_SPL_USE_ARCH_MEMCPY is not set
4# CONFIG_SPL_USE_ARCH_MEMSET is not set
Nobuhiro Iwamatsu7c112732015-10-10 05:58:28 +0900[diff] [blame]5CONFIG_ARCH_RMOBILE=y
Marek Vasut52e0ee32018-04-21 16:19:56 +0200[diff] [blame]6CONFIG_SYS_TEXT_BASE=0x50000000
7CONFIG_SPL_LIBCOMMON_SUPPORT=y
8CONFIG_SPL_LIBGENERIC_SUPPORT=y
9CONFIG_SYS_MALLOC_F_LEN=0x8000
Marek Vasutffb703d2018-05-02 11:42:22 +0200[diff] [blame]10CONFIG_ARCH_RMOBILE_BOARD_STRING="Silk"
Marek Vasut8f9a8182018-01-07 19:37:06 +0100[diff] [blame]11CONFIG_R8A7794=y
Vladimir Barinovc8c1a3e2015-01-12 19:17:07 +0300[diff] [blame]12CONFIG_TARGET_SILK=y
Marek Vasut52e0ee32018-04-21 16:19:56 +0200[diff] [blame]13CONFIG_SPL_SERIAL_SUPPORT=y
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]14CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
Tom Rinic9285bf2019-04-29 15:54:04 -0400[diff] [blame]15CONFIG_NR_DRAM_BANKS=1
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]16CONFIG_SPL=y
Marek Vasut52e0ee32018-04-21 16:19:56 +0200[diff] [blame]17CONFIG_SPL_SPI_FLASH_SUPPORT=y
18CONFIG_SPL_SPI_SUPPORT=y
Marek Vasut52e0ee32018-04-21 16:19:56 +0200[diff] [blame]19CONFIG_FIT=y
Tom Riniafea41d2016-09-08 16:11:59 -0400[diff] [blame]20CONFIG_BOOTDELAY=3
Heiko Schocher20ea7ab2016-09-09 08:12:49 +0200[diff] [blame]21CONFIG_VERSION_VARIABLE=y
Simon Goldschmidtcc4078c2018-09-30 14:31:53 +0200[diff] [blame]22CONFIG_SPL_TEXT_BASE=0xe6300000
Marek Vasut52e0ee32018-04-21 16:19:56 +0200[diff] [blame]23CONFIG_SPL_BOARD_INIT=y
24CONFIG_SPL_SYS_MALLOC_SIMPLE=y
25CONFIG_SPL_RAM_SUPPORT=y
26CONFIG_SPL_RAM_DEVICE=y
27CONFIG_SPL_SPI_LOAD=y
28CONFIG_SPL_YMODEM_SUPPORT=y
29CONFIG_HUSH_PARSER=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]30CONFIG_CMD_BOOTZ=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]31# CONFIG_CMD_IMI is not set
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]32# CONFIG_CMD_XIMG is not set
Marek Vasut52e0ee32018-04-21 16:19:56 +0200[diff] [blame]33CONFIG_CMD_GPIO=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]34CONFIG_CMD_I2C=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]35CONFIG_CMD_MMC=y
Marek Vasut52e0ee32018-04-21 16:19:56 +0200[diff] [blame]36CONFIG_CMD_PCI=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]37CONFIG_CMD_SDRAM=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]38CONFIG_CMD_SF=y
39CONFIG_CMD_SPI=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]40CONFIG_CMD_USB=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]41CONFIG_CMD_DHCP=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]42CONFIG_CMD_MII=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]43CONFIG_CMD_PING=y
Marek Vasut52e0ee32018-04-21 16:19:56 +0200[diff] [blame]44CONFIG_CMD_CACHE=y
45CONFIG_CMD_TIME=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]46CONFIG_CMD_EXT2=y
47CONFIG_CMD_EXT4=y
48CONFIG_CMD_EXT4_WRITE=y
49CONFIG_CMD_FAT=y
Marek Vasut54c633e2018-05-31 14:41:58 +0200[diff] [blame]50CONFIG_CMD_MTDPARTS=y
51CONFIG_MTDIDS_DEFAULT="nor0=spi0.0"
52CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:256k(u-boot-spl),512k(u-boot-env1),512k(u-boot-env2),768k(u-boot),-(user)"
Marek Vasut5b16e012018-01-07 20:26:04 +0100[diff] [blame]53CONFIG_OF_CONTROL=y
Tom Rini74060322018-09-03 15:26:12 -0400[diff] [blame]54CONFIG_DEFAULT_DEVICE_TREE="r8a7794-silk-u-boot"
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]55CONFIG_ENV_IS_IN_SPI_FLASH=y
Marek Vasut52e0ee32018-04-21 16:19:56 +0200[diff] [blame]56CONFIG_CLK=y
57CONFIG_CLK_RENESAS=y
58CONFIG_DM_GPIO=y
59CONFIG_RCAR_GPIO=y
60CONFIG_DM_I2C=y
Marek Vasutec745ae2018-05-01 08:57:25 +0200[diff] [blame]61CONFIG_SYS_I2C_RCAR_I2C=y
Marek Vasut52e0ee32018-04-21 16:19:56 +0200[diff] [blame]62CONFIG_SYS_I2C_RCAR_IIC=y
63CONFIG_DM_MMC=y
Marek Vasut5b020672018-04-21 17:53:07 +0200[diff] [blame]64CONFIG_SH_MMCIF=y
Marek Vasut52e0ee32018-04-21 16:19:56 +0200[diff] [blame]65CONFIG_RENESAS_SDHI=y
Marek Vasut54c633e2018-05-31 14:41:58 +0200[diff] [blame]66CONFIG_MTD=y
Adam Fordac44a302018-07-07 22:18:22 -0500[diff] [blame]67CONFIG_MTD_DEVICE=y
Marek Vasut20106932019-02-19 05:07:13 +0100[diff] [blame]68CONFIG_DM_SPI_FLASH=y
Joe Hershberger17491a82015-06-22 16:15:29 -0500[diff] [blame]69CONFIG_SPI_FLASH=y
Bin Meng27f5b192015-11-25 05:34:54 -0800[diff] [blame]70CONFIG_SPI_FLASH_SPANSION=y
Marek Vasut54c633e2018-05-31 14:41:58 +0200[diff] [blame]71CONFIG_SPI_FLASH_MTD=y
Alexandru Gagniuc4e24ff62017-08-01 17:20:00 -0700[diff] [blame]72CONFIG_PHY_MICREL=y
Marek Vasut52e0ee32018-04-21 16:19:56 +0200[diff] [blame]73CONFIG_DM_ETH=y
Nobuhiro Iwamatsuf593ecb2017-12-01 16:08:03 +0900[diff] [blame]74CONFIG_SH_ETHER=y
Marek Vasut52e0ee32018-04-21 16:19:56 +0200[diff] [blame]75CONFIG_PCI=y
76CONFIG_DM_PCI=y
77CONFIG_PCI_RCAR_GEN2=y
78CONFIG_PINCTRL=y
79CONFIG_PINCONF=y
80CONFIG_PINCTRL_PFC=y
81CONFIG_DM_REGULATOR=y
82CONFIG_DM_REGULATOR_FIXED=y
83CONFIG_DM_REGULATOR_GPIO=y
Marek Vasut2b2e4832017-07-21 23:18:46 +0200[diff] [blame]84CONFIG_SCIF_CONSOLE=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]85CONFIG_SPI=y
Marek Vasut20106932019-02-19 05:07:13 +0100[diff] [blame]86CONFIG_DM_SPI=y
Tuomas Tynkkynenfa8fdfd2018-02-07 02:42:17 +0200[diff] [blame]87CONFIG_SH_QSPI=y
Tom Rini6e9cb112016-09-08 16:31:26 -0400[diff] [blame]88CONFIG_USB=y
Marek Vasut52e0ee32018-04-21 16:19:56 +0200[diff] [blame]89CONFIG_DM_USB=y
Tom Rini7716cd62017-05-12 22:33:28 -0400[diff] [blame]90CONFIG_USB_EHCI_HCD=y
Marek Vasut52e0ee32018-04-21 16:19:56 +0200[diff] [blame]91CONFIG_USB_EHCI_PCI=y
Tom Rini6e9cb112016-09-08 16:31:26 -0400[diff] [blame]92CONFIG_USB_STORAGE=y