| Dirk Eibach | fb60594 | 2017-02-22 16:07:23 +0100 | [diff] [blame] | 1 | # |
| 2 | # Copyright (C) 2014 Stefan Roese <sr@denx.de> |
| 3 | # |
| 4 | |
| 5 | # Armada 38x uses version 1 image format |
| 6 | VERSION 1 |
| 7 | |
| Pali Rohár | 8f3dcb8 | 2022-01-12 18:20:44 +0100 | [diff] [blame] | 8 | # Type of the CPU core |
| 9 | #@CPU |
| 10 | |
| Dirk Eibach | fb60594 | 2017-02-22 16:07:23 +0100 | [diff] [blame] | 11 | # Boot Media configurations |
| 12 | #@BOOT_FROM |
| 13 | |
| Pali Rohár | 5c5cf60 | 2023-01-10 22:55:21 +0100 | [diff] [blame] | 14 | # NAND configuration |
| 15 | #@NAND_PAGE_SIZE |
| 16 | #@NAND_BLKSZ |
| 17 | #@NAND_BADBLK_LOCATION |
| 18 | |
| Pali Rohár | b938acc | 2022-01-12 18:20:47 +0100 | [diff] [blame] | 19 | # Enable BootROM output via DEBUG flag on SoCs which require it |
| 20 | #@DEBUG |
| 21 | |
| Pali Rohár | e29a007 | 2022-01-12 18:20:45 +0100 | [diff] [blame] | 22 | # Include U-Boot SPL with DDR3 training code into Binary Header |
| 23 | BINARY spl/u-boot-spl.bin #@LOAD_ADDRESS |