blob: 613fe793c432513c510dd611cb46b0afc7cb0c92 [file] [log] [blame]
Yanhong Wang6a5a45d2023-03-29 11:42:17 +08001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2022 StarFive Technology Co., Ltd.
4 * Author: Yanhong Wang<yanhong.wang@starfivetech.com>
5 */
6
7#include <common.h>
8#include <asm/io.h>
9#include <cpu_func.h>
10#include <linux/bitops.h>
11
12#define JH7110_L2_PREFETCHER_BASE_ADDR 0x2030000
13#define JH7110_L2_PREFETCHER_HART_OFFSET 0x2000
14
15/* enable U74-mc hart1~hart4 prefetcher */
16static void enable_prefetcher(void)
17{
18 u8 hart;
19 u32 *reg;
20
21 /* JH7110 use U74MC CORE IP, it include five cores(one S7 and four U7),
22 * but only U7 cores support prefetcher configuration
23 */
24 for (hart = 1; hart < 5; hart++) {
25 reg = (void *)(u64)(JH7110_L2_PREFETCHER_BASE_ADDR
26 + hart * JH7110_L2_PREFETCHER_HART_OFFSET);
27
28 mb(); /* memory barrier */
29 setbits_le32(reg, 0x1);
30 mb(); /* memory barrier */
31 }
32}
33
34int board_init(void)
35{
36 enable_caches();
37 enable_prefetcher();
38
39 return 0;
40}