Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2015 Beckhoff Automation GmbH & Co. KG |
| 4 | * Patrick Bruenn <p.bruenn@beckhoff.com> |
| 5 | * |
| 6 | * Configuration settings for Beckhoff CX9020. |
| 7 | * |
| 8 | * Based on Freescale's Linux i.MX mx53loco.h file: |
| 9 | * Copyright (C) 2010-2011 Freescale Semiconductor. |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 10 | */ |
| 11 | |
| 12 | #ifndef __CONFIG_H |
| 13 | #define __CONFIG_H |
| 14 | |
| 15 | #include <asm/arch/imx-regs.h> |
| 16 | |
Tom Rini | a17aa19 | 2022-12-04 10:04:55 -0500 | [diff] [blame] | 17 | #define CFG_MXC_UART_BASE UART2_BASE |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 18 | |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 19 | /* MMC Configs */ |
Tom Rini | 376b88a | 2022-10-28 20:27:13 -0400 | [diff] [blame] | 20 | #define CFG_SYS_FSL_ESDHC_ADDR 0 |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 21 | |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 22 | /* bootz: zImage/initrd.img support */ |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 23 | |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 24 | |
| 25 | /* USB Configs */ |
Tom Rini | b9796e8 | 2022-12-04 10:04:56 -0500 | [diff] [blame] | 26 | #define CFG_MXC_USB_PORT 1 |
| 27 | #define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) |
| 28 | #define CFG_MXC_USB_FLAGS 0 |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 29 | |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 30 | /* Command definition */ |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 31 | |
Steffen Dirkwinkel | ab0ed60 | 2019-10-23 07:40:43 +0200 | [diff] [blame] | 32 | #define BOOT_TARGET_DEVICES(func) \ |
| 33 | func(MMC, mmc, 0) \ |
| 34 | func(MMC, mmc, 1) \ |
| 35 | func(USB, usb, 0) \ |
| 36 | func(PXE, pxe, na) |
| 37 | |
| 38 | #include <config_distro_bootcmd.h> |
| 39 | |
Tom Rini | c9edebe | 2022-12-04 10:03:50 -0500 | [diff] [blame] | 40 | #define CFG_EXTRA_ENV_SETTINGS \ |
Steffen Dirkwinkel | ab0ed60 | 2019-10-23 07:40:43 +0200 | [diff] [blame] | 41 | "fdt_addr_r=0x75000000\0" \ |
Patrick Bruenn | 2ef943e | 2017-07-11 11:23:21 +0200 | [diff] [blame] | 42 | "pxefile_addr_r=0x73000000\0" \ |
Steffen Dirkwinkel | ab0ed60 | 2019-10-23 07:40:43 +0200 | [diff] [blame] | 43 | "scriptaddr=0x74000000\0" \ |
| 44 | "ramdisk_addr_r=0x80000000\0" \ |
| 45 | "kernel_addr_r=0x72000000\0" \ |
| 46 | "fdt_high=0xffffffff\0" \ |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 47 | "console=ttymxc1,115200\0" \ |
Steffen Dirkwinkel | a2cab66 | 2019-10-23 07:40:42 +0200 | [diff] [blame] | 48 | "stdin=serial\0" \ |
| 49 | "stdout=serial,vidconsole\0" \ |
| 50 | "stderr=serial,vidconsole\0" \ |
Steffen Dirkwinkel | ab0ed60 | 2019-10-23 07:40:43 +0200 | [diff] [blame] | 51 | "fdtfile=imx53-cx9020.dtb\0" \ |
| 52 | BOOTENV |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 53 | |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 54 | /* Miscellaneous configurable options */ |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 55 | |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 56 | /* Physical Memory Map */ |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 57 | #define PHYS_SDRAM_1 CSD0_BASE_ADDR |
| 58 | #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) |
| 59 | #define PHYS_SDRAM_2 CSD1_BASE_ADDR |
| 60 | #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) |
| 61 | #define PHYS_SDRAM_SIZE (gd->ram_size) |
| 62 | |
Tom Rini | bb4dd96 | 2022-11-16 13:10:37 -0500 | [diff] [blame] | 63 | #define CFG_SYS_SDRAM_BASE (PHYS_SDRAM_1) |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 64 | #define CFG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) |
| 65 | #define CFG_SYS_INIT_RAM_SIZE (IRAM_SIZE) |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 66 | |
Masahiro Yamada | 8cea9b5 | 2017-02-11 22:43:54 +0900 | [diff] [blame] | 67 | /* environment organization */ |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 68 | |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 69 | #endif /* __CONFIG_H */ |