Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Simon Glass | d2fdaaf | 2011-10-03 19:26:47 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2011 The Chromium OS Authors. |
Simon Glass | d2fdaaf | 2011-10-03 19:26:47 +0000 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #ifndef __CONFIG_H |
| 7 | #define __CONFIG_H |
| 8 | |
Simon Glass | e7f1eb5 | 2013-06-11 11:14:44 -0700 | [diff] [blame] | 9 | #ifdef FTRACE |
| 10 | #define CONFIG_TRACE |
Simon Glass | e7f1eb5 | 2013-06-11 11:14:44 -0700 | [diff] [blame] | 11 | #define CONFIG_TRACE_BUFFER_SIZE (16 << 20) |
Simon Glass | 171bb99 | 2019-04-08 13:20:46 -0600 | [diff] [blame] | 12 | #define CONFIG_TRACE_EARLY_SIZE (16 << 20) |
Simon Glass | e7f1eb5 | 2013-06-11 11:14:44 -0700 | [diff] [blame] | 13 | #define CONFIG_TRACE_EARLY |
| 14 | #define CONFIG_TRACE_EARLY_ADDR 0x00100000 |
Simon Glass | e7f1eb5 | 2013-06-11 11:14:44 -0700 | [diff] [blame] | 15 | #endif |
| 16 | |
Simon Glass | 1a4742c | 2016-07-04 11:57:52 -0600 | [diff] [blame] | 17 | #ifndef CONFIG_SPL_BUILD |
Simon Glass | 125a27b | 2014-06-11 23:29:43 -0600 | [diff] [blame] | 18 | #define CONFIG_IO_TRACE |
Simon Glass | 1a4742c | 2016-07-04 11:57:52 -0600 | [diff] [blame] | 19 | #endif |
Simon Glass | 125a27b | 2014-06-11 23:29:43 -0600 | [diff] [blame] | 20 | |
Thomas Chou | 7b059dc | 2015-10-30 15:35:52 +0800 | [diff] [blame] | 21 | #ifndef CONFIG_TIMER |
Rob Herring | 86bd4e8 | 2013-11-08 08:40:44 -0600 | [diff] [blame] | 22 | #define CONFIG_SYS_TIMER_RATE 1000000 |
Thomas Chou | 7b059dc | 2015-10-30 15:35:52 +0800 | [diff] [blame] | 23 | #endif |
Rob Herring | 86bd4e8 | 2013-11-08 08:40:44 -0600 | [diff] [blame] | 24 | |
Henrik Nordström | 26f9a6c | 2013-11-10 10:26:56 -0700 | [diff] [blame] | 25 | #define CONFIG_HOST_MAX_DEVICES 4 |
Simon Glass | eb4cecd | 2012-12-26 09:53:37 +0000 | [diff] [blame] | 26 | |
Simon Glass | d2fdaaf | 2011-10-03 19:26:47 +0000 | [diff] [blame] | 27 | /* |
Simon Glass | c757cb0 | 2014-07-10 22:23:32 -0600 | [diff] [blame] | 28 | * Size of malloc() pool, before and after relocation |
Simon Glass | d2fdaaf | 2011-10-03 19:26:47 +0000 | [diff] [blame] | 29 | */ |
Simon Glass | c757cb0 | 2014-07-10 22:23:32 -0600 | [diff] [blame] | 30 | #define CONFIG_MALLOC_F_ADDR 0x0010000 |
Simon Glass | 7b89a1b | 2014-02-27 13:25:56 -0700 | [diff] [blame] | 31 | #define CONFIG_SYS_MALLOC_LEN (32 << 20) /* 32MB */ |
Simon Glass | d2fdaaf | 2011-10-03 19:26:47 +0000 | [diff] [blame] | 32 | |
Simon Glass | d2fdaaf | 2011-10-03 19:26:47 +0000 | [diff] [blame] | 33 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
| 34 | |
Simon Glass | d2fdaaf | 2011-10-03 19:26:47 +0000 | [diff] [blame] | 35 | /* turn on command-line edit/c/auto */ |
Simon Glass | d2fdaaf | 2011-10-03 19:26:47 +0000 | [diff] [blame] | 36 | |
Simon Glass | 1f21d48 | 2014-09-15 06:33:20 -0600 | [diff] [blame] | 37 | /* SPI - enable all SPI flash types for testing purposes */ |
Mike Frysinger | 494b82b | 2013-12-03 16:43:28 -0700 | [diff] [blame] | 38 | |
Simon Glass | b3cbce2 | 2014-12-10 08:55:52 -0700 | [diff] [blame] | 39 | #define CONFIG_I2C_EDID |
Simon Glass | b3cbce2 | 2014-12-10 08:55:52 -0700 | [diff] [blame] | 40 | |
Simon Glass | d2fdaaf | 2011-10-03 19:26:47 +0000 | [diff] [blame] | 41 | /* Memory things - we don't really want a memory test */ |
Simon Glass | a081a0f | 2013-02-24 20:29:23 +0000 | [diff] [blame] | 42 | #define CONFIG_SYS_LOAD_ADDR 0x00000000 |
Simon Glass | 84640e8 | 2014-02-27 13:26:25 -0700 | [diff] [blame] | 43 | #define CONFIG_SYS_FDT_LOAD_ADDR 0x100 |
| 44 | |
| 45 | #define CONFIG_PHYSMEM |
Simon Glass | d2fdaaf | 2011-10-03 19:26:47 +0000 | [diff] [blame] | 46 | |
| 47 | /* Size of our emulated memory */ |
Heinrich Schuchardt | fff251e | 2020-06-07 18:47:35 +0200 | [diff] [blame] | 48 | #define SB_CONCAT(x, y) x ## y |
| 49 | #define SB_TO_UL(s) SB_CONCAT(s, UL) |
Simon Glass | 62cf912 | 2013-04-26 02:53:43 +0000 | [diff] [blame] | 50 | #define CONFIG_SYS_SDRAM_BASE 0 |
Heinrich Schuchardt | fff251e | 2020-06-07 18:47:35 +0200 | [diff] [blame] | 51 | #define CONFIG_SYS_SDRAM_SIZE \ |
| 52 | (SB_TO_UL(CONFIG_SANDBOX_RAM_SIZE_MB) << 20) |
Simon Glass | 62cf912 | 2013-04-26 02:53:43 +0000 | [diff] [blame] | 53 | #define CONFIG_SYS_MONITOR_BASE 0 |
Simon Glass | d2fdaaf | 2011-10-03 19:26:47 +0000 | [diff] [blame] | 54 | |
Simon Glass | d2fdaaf | 2011-10-03 19:26:47 +0000 | [diff] [blame] | 55 | #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ |
| 56 | 115200} |
Simon Glass | d2fdaaf | 2011-10-03 19:26:47 +0000 | [diff] [blame] | 57 | |
Sjoerd Simons | d094224 | 2015-04-13 22:54:27 +0200 | [diff] [blame] | 58 | #define BOOT_TARGET_DEVICES(func) \ |
| 59 | func(HOST, host, 1) \ |
| 60 | func(HOST, host, 0) |
| 61 | |
Simon Glass | 07bb5e7 | 2019-05-18 11:59:48 -0600 | [diff] [blame] | 62 | #ifdef __ASSEMBLY__ |
| 63 | #define BOOTENV |
| 64 | #else |
Sjoerd Simons | d094224 | 2015-04-13 22:54:27 +0200 | [diff] [blame] | 65 | #include <config_distro_bootcmd.h> |
Simon Glass | 07bb5e7 | 2019-05-18 11:59:48 -0600 | [diff] [blame] | 66 | #endif |
Simon Glass | d2fdaaf | 2011-10-03 19:26:47 +0000 | [diff] [blame] | 67 | |
Joe Hershberger | c7dc2a3 | 2015-04-08 01:41:25 -0500 | [diff] [blame] | 68 | #define CONFIG_KEEP_SERVERADDR |
| 69 | #define CONFIG_UDP_CHECKSUM |
Joe Hershberger | c7dc2a3 | 2015-04-08 01:41:25 -0500 | [diff] [blame] | 70 | #define CONFIG_TIMESTAMP |
Joe Hershberger | c96323f | 2015-03-22 17:09:22 -0500 | [diff] [blame] | 71 | #define CONFIG_BOOTP_SERVERIP |
Simon Glass | d2fdaaf | 2011-10-03 19:26:47 +0000 | [diff] [blame] | 72 | |
Simon Glass | dcc0bf4 | 2014-03-22 17:12:58 -0600 | [diff] [blame] | 73 | #ifndef SANDBOX_NO_SDL |
Simon Glass | 84640e8 | 2014-02-27 13:26:25 -0700 | [diff] [blame] | 74 | #define CONFIG_SANDBOX_SDL |
Simon Glass | dcc0bf4 | 2014-03-22 17:12:58 -0600 | [diff] [blame] | 75 | #endif |
| 76 | |
| 77 | /* LCD and keyboard require SDL support */ |
| 78 | #ifdef CONFIG_SANDBOX_SDL |
Simon Glass | 84640e8 | 2014-02-27 13:26:25 -0700 | [diff] [blame] | 79 | #define LCD_BPP LCD_COLOR16 |
Simon Glass | f461f12 | 2014-10-15 04:53:04 -0600 | [diff] [blame] | 80 | #define CONFIG_LCD_BMP_RLE8 |
Simon Glass | 84640e8 | 2014-02-27 13:26:25 -0700 | [diff] [blame] | 81 | |
Simon Glass | dcc0bf4 | 2014-03-22 17:12:58 -0600 | [diff] [blame] | 82 | #define CONFIG_KEYBOARD |
| 83 | |
Simon Glass | 2b510fa | 2015-11-08 23:48:07 -0700 | [diff] [blame] | 84 | #define SANDBOX_SERIAL_SETTINGS "stdin=serial,cros-ec-keyb,usbkbd\0" \ |
Simon Glass | 798ff50 | 2016-01-21 19:44:51 -0700 | [diff] [blame] | 85 | "stdout=serial,vidconsole\0" \ |
| 86 | "stderr=serial,vidconsole\0" |
Simon Glass | dcc0bf4 | 2014-03-22 17:12:58 -0600 | [diff] [blame] | 87 | #else |
Joe Hershberger | 6ab7699 | 2015-03-22 17:09:13 -0500 | [diff] [blame] | 88 | #define SANDBOX_SERIAL_SETTINGS "stdin=serial\0" \ |
Simon Glass | 798ff50 | 2016-01-21 19:44:51 -0700 | [diff] [blame] | 89 | "stdout=serial,vidconsole\0" \ |
| 90 | "stderr=serial,vidconsole\0" |
Simon Glass | dcc0bf4 | 2014-03-22 17:12:58 -0600 | [diff] [blame] | 91 | #endif |
Simon Glass | d2fdaaf | 2011-10-03 19:26:47 +0000 | [diff] [blame] | 92 | |
Joe Hershberger | 6ab7699 | 2015-03-22 17:09:13 -0500 | [diff] [blame] | 93 | #define SANDBOX_ETH_SETTINGS "ethaddr=00:00:11:22:33:44\0" \ |
Claudiu Manoil | d9eaa92 | 2021-03-14 20:14:57 +0800 | [diff] [blame] | 94 | "eth2addr=00:00:11:22:33:48\0" \ |
Michael Walle | 7c41a22 | 2020-06-02 01:47:09 +0200 | [diff] [blame] | 95 | "eth3addr=00:00:11:22:33:45\0" \ |
Claudiu Manoil | d9eaa92 | 2021-03-14 20:14:57 +0800 | [diff] [blame] | 96 | "eth4addr=00:00:11:22:33:48\0" \ |
Michael Walle | 7c41a22 | 2020-06-02 01:47:09 +0200 | [diff] [blame] | 97 | "eth5addr=00:00:11:22:33:46\0" \ |
| 98 | "eth6addr=00:00:11:22:33:47\0" \ |
Joe Hershberger | 6ab7699 | 2015-03-22 17:09:13 -0500 | [diff] [blame] | 99 | "ipaddr=1.2.3.4\0" |
| 100 | |
Sjoerd Simons | d094224 | 2015-04-13 22:54:27 +0200 | [diff] [blame] | 101 | #define MEM_LAYOUT_ENV_SETTINGS \ |
| 102 | "bootm_size=0x10000000\0" \ |
| 103 | "kernel_addr_r=0x1000000\0" \ |
| 104 | "fdt_addr_r=0xc00000\0" \ |
| 105 | "ramdisk_addr_r=0x2000000\0" \ |
| 106 | "scriptaddr=0x1000\0" \ |
| 107 | "pxefile_addr_r=0x2000\0" |
| 108 | |
| 109 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 110 | SANDBOX_SERIAL_SETTINGS \ |
| 111 | SANDBOX_ETH_SETTINGS \ |
| 112 | BOOTENV \ |
| 113 | MEM_LAYOUT_ENV_SETTINGS |
Joe Hershberger | 6ab7699 | 2015-03-22 17:09:13 -0500 | [diff] [blame] | 114 | |
Simon Glass | 1a4742c | 2016-07-04 11:57:52 -0600 | [diff] [blame] | 115 | #ifndef CONFIG_SPL_BUILD |
Simon Glass | 4e7227c | 2016-05-01 11:36:23 -0600 | [diff] [blame] | 116 | #define CONFIG_SYS_IDE_MAXBUS 1 |
| 117 | #define CONFIG_SYS_ATA_IDE0_OFFSET 0 |
| 118 | #define CONFIG_SYS_IDE_MAXDEVICE 2 |
| 119 | #define CONFIG_SYS_ATA_BASE_ADDR 0x100 |
| 120 | #define CONFIG_SYS_ATA_DATA_OFFSET 0 |
| 121 | #define CONFIG_SYS_ATA_REG_OFFSET 1 |
| 122 | #define CONFIG_SYS_ATA_ALT_OFFSET 2 |
| 123 | #define CONFIG_SYS_ATA_STRIDE 4 |
Simon Glass | 1a4742c | 2016-07-04 11:57:52 -0600 | [diff] [blame] | 124 | #endif |
Simon Glass | 4e7227c | 2016-05-01 11:36:23 -0600 | [diff] [blame] | 125 | |
Simon Glass | 151b935 | 2016-05-01 11:36:25 -0600 | [diff] [blame] | 126 | #define CONFIG_SCSI_AHCI_PLAT |
| 127 | #define CONFIG_SYS_SCSI_MAX_DEVICE 2 |
| 128 | #define CONFIG_SYS_SCSI_MAX_SCSI_ID 8 |
| 129 | #define CONFIG_SYS_SCSI_MAX_LUN 4 |
| 130 | |
Simon Glass | 4a63e33 | 2016-05-01 11:36:27 -0600 | [diff] [blame] | 131 | #define CONFIG_SYS_SATA_MAX_DEVICE 2 |
| 132 | |
Simon Glass | d2fdaaf | 2011-10-03 19:26:47 +0000 | [diff] [blame] | 133 | #endif |