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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Hans de Goede3352b222014-06-13 22:55:49 +02002/*
3 * Copyright 2014 - Hans de Goede <hdegoede@redhat.com>
Hans de Goede3352b222014-06-13 22:55:49 +02004 */
5#ifndef _SUNXI_I2C_H_
6#define _SUNXI_I2C_H_
7
8#include <asm/arch/cpu.h>
9
Paul Kocialkowski0a3ec0a2015-04-10 23:09:52 +020010#ifdef CONFIG_I2C0_ENABLE
Tom Rinic188ed42022-12-04 10:04:09 -050011#define CFG_I2C_MVTWSI_BASE0 SUNXI_TWI0_BASE
Paul Kocialkowski0a3ec0a2015-04-10 23:09:52 +020012#endif
13#ifdef CONFIG_I2C1_ENABLE
Tom Rini34e4e862022-12-04 10:04:10 -050014#define CFG_I2C_MVTWSI_BASE1 SUNXI_TWI1_BASE
Paul Kocialkowski0a3ec0a2015-04-10 23:09:52 +020015#endif
Jelle van der Waa8d3d7c12016-01-14 14:06:26 +010016#ifdef CONFIG_R_I2C_ENABLE
Tom Rini364d0022023-01-10 11:19:45 -050017#define CFG_I2C_MVTWSI_BASE2 SUNXI_R_TWI_BASE
Jelle van der Waa8d3d7c12016-01-14 14:06:26 +010018#endif
Paul Kocialkowski0a3ec0a2015-04-10 23:09:52 +020019
Hans de Goede3352b222014-06-13 22:55:49 +020020/* This is abp0-clk on sun4i/5i/7i / abp1-clk on sun6i/sun8i which is 24MHz */
Tom Rini6a5dccc2022-11-16 13:10:41 -050021#define CFG_SYS_TCLK 24000000
Hans de Goede3352b222014-06-13 22:55:49 +020022
23#endif