developer | 2fddd72 | 2022-05-20 11:22:21 +0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* |
| 3 | * Copyright (C) 2022 MediaTek Inc. All rights reserved. |
| 4 | * |
| 5 | * Author: Weijie Gao <weijie.gao@mediatek.com> |
| 6 | */ |
| 7 | |
| 8 | #ifndef _LAUNCH_H_ |
| 9 | #define _LAUNCH_H_ |
| 10 | |
| 11 | #ifndef __ASSEMBLY__ |
| 12 | |
| 13 | struct cpulaunch_t { |
| 14 | unsigned long pc; |
| 15 | unsigned long gp; |
| 16 | unsigned long sp; |
| 17 | unsigned long a0; |
| 18 | unsigned long _pad[3]; /* pad to cache line size to avoid thrashing */ |
| 19 | unsigned long flags; |
| 20 | }; |
| 21 | |
| 22 | extern char launch_wait_code_start; |
| 23 | extern char launch_wait_code_end; |
| 24 | |
| 25 | void join_coherent_domain(int ncores); |
| 26 | void boot_vpe1(void); |
| 27 | |
| 28 | #else |
| 29 | |
| 30 | #define LAUNCH_PC 0 |
| 31 | #define LAUNCH_GP 4 |
| 32 | #define LAUNCH_SP 8 |
| 33 | #define LAUNCH_A0 12 |
| 34 | #define LAUNCH_FLAGS 28 |
| 35 | |
| 36 | #endif |
| 37 | |
| 38 | #define LOG2CPULAUNCH 5 |
| 39 | |
| 40 | #define LAUNCH_FREADY 1 |
| 41 | #define LAUNCH_FGO 2 |
| 42 | #define LAUNCH_FGONE 4 |
| 43 | |
| 44 | #define LAUNCH_WAITCODE 0x00000d00 |
| 45 | #define SCRLAUNCH 0x00000e00 |
| 46 | #define CPULAUNCH 0x00000f00 |
| 47 | #define NCPULAUNCH 8 |
| 48 | |
| 49 | /* Polling period in count cycles for secondary CPU's */ |
| 50 | #define LAUNCHPERIOD 10000 |
| 51 | |
| 52 | #endif /* _LAUNCH_H_ */ |