Sjoerd Simons | f93564c | 2019-02-25 15:33:00 +0000 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * am335x_guardian_.h |
| 4 | * |
| 5 | * Copyright (C) 2018 Robert Bosch Power Tools GmbH |
| 6 | * Copyright (C) 2018 sjoerd Simons <sjoerd.simons@collabora.co.uk> |
| 7 | * |
| 8 | */ |
| 9 | |
| 10 | #ifndef __CONFIG_AM335X_GUARDIAN_H |
| 11 | #define __CONFIG_AM335X_GUARDIAN_H |
| 12 | |
| 13 | #include <configs/ti_am335x_common.h> |
| 14 | |
| 15 | #ifndef CONFIG_SPL_BUILD |
| 16 | #define CONFIG_TIMESTAMP |
| 17 | #endif |
| 18 | |
Moses Christopher | 6a89b00 | 2019-09-17 14:25:38 +0000 | [diff] [blame] | 19 | #define CONFIG_SYS_BOOTM_LEN (16 << 20) |
| 20 | |
Sjoerd Simons | f93564c | 2019-02-25 15:33:00 +0000 | [diff] [blame] | 21 | /* Clock Defines */ |
| 22 | #define V_OSCK 24000000 /* Clock output from T2 */ |
| 23 | #define V_SCLK (V_OSCK) |
| 24 | |
| 25 | #ifndef CONFIG_SPL_BUILD |
| 26 | |
| 27 | #define MEM_LAYOUT_ENV_SETTINGS \ |
| 28 | "scriptaddr=0x80000000\0" \ |
| 29 | "pxefile_addr_r=0x80100000\0" \ |
Moses Christopher | 6e5c4ed | 2021-06-11 16:13:36 +0000 | [diff] [blame] | 30 | "tftp_load_addr=0x82000000\0" \ |
Sjoerd Simons | f93564c | 2019-02-25 15:33:00 +0000 | [diff] [blame] | 31 | "kernel_addr_r=0x82000000\0" \ |
| 32 | "fdt_addr_r=0x88000000\0" \ |
| 33 | "ramdisk_addr_r=0x88080000\0" \ |
| 34 | |
| 35 | #define BOOT_TARGET_DEVICES(func) \ |
Moses Christopher | 3d13005 | 2020-03-25 06:45:48 +0000 | [diff] [blame] | 36 | func(UBIFS, ubifs, 0) |
Sjoerd Simons | f93564c | 2019-02-25 15:33:00 +0000 | [diff] [blame] | 37 | |
| 38 | #define AM335XX_BOARD_FDTFILE "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" |
| 39 | |
| 40 | #include <config_distro_bootcmd.h> |
| 41 | |
Moses Christopher | 18e52bd | 2020-03-25 06:45:47 +0000 | [diff] [blame] | 42 | #define GUARDIAN_DEFAULT_PROD_ENV \ |
| 43 | "factory_assembly_status=0\0" \ |
| 44 | "main_pcba_part_number=0\0" \ |
| 45 | "main_pcba_supplier=0\0" \ |
| 46 | "main_pcba_timestamp=0\0" \ |
| 47 | "main_pcba_hardware_version=0\0" \ |
| 48 | "main_pcba_id=0\0" \ |
| 49 | "main_pcba_aux_1=0\0" \ |
| 50 | "main_pcba_aux_2=0\0" \ |
| 51 | "main_pcba_aux_3=0\0" \ |
| 52 | "main_pcba_aux_4=0\0" \ |
| 53 | |
Sjoerd Simons | f93564c | 2019-02-25 15:33:00 +0000 | [diff] [blame] | 54 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 55 | AM335XX_BOARD_FDTFILE \ |
| 56 | MEM_LAYOUT_ENV_SETTINGS \ |
| 57 | BOOTENV \ |
Moses Christopher | 18e52bd | 2020-03-25 06:45:47 +0000 | [diff] [blame] | 58 | GUARDIAN_DEFAULT_PROD_ENV \ |
Gireesh Hiremath | a329f1b | 2021-06-11 16:13:39 +0000 | [diff] [blame] | 59 | "autoload=no\0" \ |
Gireesh Hiremath | 567d76e | 2021-06-11 16:13:44 +0000 | [diff] [blame] | 60 | "backlight_brightness=50\0" \ |
Moses Christopher | 6a89b00 | 2019-09-17 14:25:38 +0000 | [diff] [blame] | 61 | "bootubivol=rootfs\0" \ |
Moses Christopher | 3d13005 | 2020-03-25 06:45:48 +0000 | [diff] [blame] | 62 | "distro_bootcmd=" \ |
Moses Christopher | 3d13005 | 2020-03-25 06:45:48 +0000 | [diff] [blame] | 63 | "setenv rootflags \"bulk_read,chk_data_crc\"; " \ |
| 64 | "setenv ethact usb_ether; " \ |
| 65 | "if test \"${swi_status}\" -eq 1; then " \ |
Moses Christopher | 3d13005 | 2020-03-25 06:45:48 +0000 | [diff] [blame] | 66 | "if dhcp; then " \ |
| 67 | "sleep 1; " \ |
| 68 | "if tftp \"${tftp_load_addr}\" \"bootscript.scr\"; then " \ |
| 69 | "source \"${tftp_load_addr}\"; " \ |
| 70 | "fi; " \ |
| 71 | "fi; " \ |
Gireesh Hiremath | e6d0bff | 2021-06-11 16:13:43 +0000 | [diff] [blame] | 72 | "setenv extrabootargs $extrabootargs \"swi_attached\"; " \ |
Moses Christopher | 3d13005 | 2020-03-25 06:45:48 +0000 | [diff] [blame] | 73 | "fi;" \ |
| 74 | "run bootcmd_ubifs0;\0" \ |
Sjoerd Simons | f93564c | 2019-02-25 15:33:00 +0000 | [diff] [blame] | 75 | "altbootcmd=" \ |
Moses Christopher | 3d13005 | 2020-03-25 06:45:48 +0000 | [diff] [blame] | 76 | "setenv boot_syslinux_conf \"extlinux/extlinux-rollback.conf\"; " \ |
| 77 | "run distro_bootcmd; " \ |
| 78 | "setenv boot_syslinux_conf \"extlinux/extlinux.conf\"; " \ |
| 79 | "run bootcmd_ubifs0;\0" |
Sjoerd Simons | f93564c | 2019-02-25 15:33:00 +0000 | [diff] [blame] | 80 | |
Moses Christopher | 6a89b00 | 2019-09-17 14:25:38 +0000 | [diff] [blame] | 81 | #endif /* ! CONFIG_SPL_BUILD */ |
Sjoerd Simons | f93564c | 2019-02-25 15:33:00 +0000 | [diff] [blame] | 82 | |
Gireesh Hiremath | 6b755fa | 2021-06-11 16:13:47 +0000 | [diff] [blame] | 83 | #define CONFIG_BMP_16BPP |
| 84 | #define SPLASH_SCREEN_NAND_PART "nand0,10" |
| 85 | #define SPLASH_SCREEN_BMP_FILE_SIZE 0x26000 |
| 86 | #define SPLASH_SCREEN_BMP_LOAD_ADDR 0x82000000 |
| 87 | #define SPLASH_SCREEN_TEXT "U-Boot" |
| 88 | |
| 89 | /* BGR 16Bit Color Definitions */ |
| 90 | #define CONSOLE_COLOR_BLACK 0x0000 |
| 91 | #define CONSOLE_COLOR_WHITE 0xFFFF |
| 92 | #define CONSOLE_COLOR_RED 0x001F |
| 93 | |
Sjoerd Simons | f93564c | 2019-02-25 15:33:00 +0000 | [diff] [blame] | 94 | /* NS16550 Configuration */ |
| 95 | #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */ |
| 96 | #define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ |
| 97 | #define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */ |
| 98 | #define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */ |
| 99 | #define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ |
| 100 | #define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ |
| 101 | |
| 102 | /* PMIC support */ |
| 103 | #define CONFIG_POWER_TPS65217 |
| 104 | |
| 105 | /* Bootcount using the RTC block */ |
| 106 | #define CONFIG_SYS_BOOTCOUNT_LE |
| 107 | |
Miquel Raynal | d093536 | 2019-10-03 19:50:03 +0200 | [diff] [blame] | 108 | #ifdef CONFIG_MTD_RAW_NAND |
Sjoerd Simons | f93564c | 2019-02-25 15:33:00 +0000 | [diff] [blame] | 109 | |
| 110 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE |
| 111 | #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ |
| 112 | CONFIG_SYS_NAND_PAGE_SIZE) |
Sjoerd Simons | f93564c | 2019-02-25 15:33:00 +0000 | [diff] [blame] | 113 | |
| 114 | #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ |
| 115 | 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \ |
| 116 | 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, \ |
| 117 | 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, \ |
| 118 | 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, \ |
| 119 | 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, \ |
| 120 | 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, \ |
| 121 | 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, \ |
| 122 | 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, \ |
| 123 | 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, \ |
| 124 | 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, \ |
| 125 | 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, \ |
| 126 | 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, \ |
| 127 | 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, \ |
| 128 | 140, 141, 142, 143, 144, 145, 146, 147, 148, 149, \ |
| 129 | 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, \ |
| 130 | 160, 161, 162, 163, 164, 165, 166, 167, 168, 169, \ |
| 131 | 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, \ |
| 132 | 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, \ |
| 133 | 190, 191, 192, 193, 194, 195, 196, 197, 198, 199, \ |
| 134 | 200, 201, 202, 203, 204, 205, 206, 207, 208, 209, \ |
| 135 | } |
| 136 | #define CONFIG_SYS_NAND_ECCSIZE 512 |
| 137 | #define CONFIG_SYS_NAND_ECCBYTES 26 |
| 138 | #define CONFIG_SYS_NAND_ONFI_DETECTION |
| 139 | #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH16_CODE_HW |
| 140 | #define MTDIDS_DEFAULT "nand0=nand.0" |
| 141 | |
| 142 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS |
| 143 | |
Miquel Raynal | d093536 | 2019-10-03 19:50:03 +0200 | [diff] [blame] | 144 | #endif /* CONFIG_MTD_RAW_NAND */ |
Sjoerd Simons | f93564c | 2019-02-25 15:33:00 +0000 | [diff] [blame] | 145 | |
Moses Christopher | b17031e | 2020-03-25 06:45:44 +0000 | [diff] [blame] | 146 | #define CONFIG_AM335X_USB0 |
| 147 | #define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL |
| 148 | #define CONFIG_AM335X_USB1 |
| 149 | #define CONFIG_AM335X_USB1_MODE MUSB_HOST |
| 150 | |
Sjoerd Simons | f93564c | 2019-02-25 15:33:00 +0000 | [diff] [blame] | 151 | #endif /* ! __CONFIG_AM335X_GUARDIAN_H */ |