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git01.mediatek.com / filogic / uboot / fac5ba8a6c86d5edfcb2a813281471d3af9f5c7e / . / configs / ls1021aiot_qspi_defconfig
blob: 7ba0c47a5bbb7a4b3c334b83bbf48bed01f5ac02 [file] [log] [blame]
Feng Li39e112d2016-11-03 14:15:17 +0800[diff] [blame]1CONFIG_ARM=y
Masahiro Yamada74f09b82016-12-07 22:10:25 +0900[diff] [blame]2CONFIG_TARGET_LS1021AIOT=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]3CONFIG_SYS_TEXT_BASE=0x40010000
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]4CONFIG_ENV_SIZE=0x2000
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]5CONFIG_ENV_SECT_SIZE=0x10000
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]6CONFIG_ENV_OFFSET=0x100000
Tom Rini6bd3b142020-02-06 13:42:52 -0500[diff] [blame]7CONFIG_DM_GPIO=y
Tom Rinif2260382018-08-16 08:16:24 -0400[diff] [blame]8CONFIG_NR_DRAM_BANKS=1
Tom Rinic9285bf2019-04-29 15:54:04 -0400[diff] [blame]9CONFIG_AHCI=y
Masahiro Yamada74f09b82016-12-07 22:10:25 +0900[diff] [blame]10CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
Adam Ford10541762018-07-29 13:13:29 -0500[diff] [blame]11CONFIG_MISC_INIT_R=y
Simon Glass7a99a872017-01-23 13:31:20 -0700[diff] [blame]12CONFIG_BOARD_EARLY_INIT_F=y
Fabio Estevam6ad3c1a2017-09-28 13:24:30 -0300[diff] [blame]13CONFIG_CMD_BOOTZ=y
Patrick Delaunay73287092017-01-27 11:00:42 +0100[diff] [blame]14CONFIG_CMD_GPT=y
Tom Rini732aa4a2018-02-10 16:54:38 -0500[diff] [blame]15CONFIG_CMD_DHCP=y
16CONFIG_CMD_PING=y
Tom Rini504997e2017-08-25 17:50:26 -0400[diff] [blame]17CONFIG_CMD_EXT2=y
Tom Rinid8532af2017-06-02 11:03:50 -0400[diff] [blame]18CONFIG_CMD_FAT=y
Feng Li39e112d2016-11-03 14:15:17 +0800[diff] [blame]19CONFIG_OF_CONTROL=y
Tom Rini74060322018-09-03 15:26:12 -0400[diff] [blame]20CONFIG_DEFAULT_DEVICE_TREE="ls1021a-iot-duart"
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]21CONFIG_ENV_IS_IN_SPI_FLASH=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]22CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Masahiro Yamada74f09b82016-12-07 22:10:25 +0900[diff] [blame]23CONFIG_DM=y
Peng Ma99503ac2019-01-30 19:19:40 +0800[diff] [blame]24CONFIG_SATA_CEVA=y
Tom Rinia5c4d402017-03-01 16:51:58 -0500[diff] [blame]25CONFIG_FSL_CAAM=y
Tom Rini6bd3b142020-02-06 13:42:52 -0500[diff] [blame]26CONFIG_DM_I2C=y
Peng Ma99503ac2019-01-30 19:19:40 +0800[diff] [blame]27CONFIG_DM_MMC=y
Mario Six41d7d972018-03-28 14:38:19 +0200[diff] [blame]28CONFIG_FSL_ESDHC=y
Miquel Raynal2e35dbb2019-10-03 19:50:05 +0200[diff] [blame]29CONFIG_MTD=y
Feng Li39e112d2016-11-03 14:15:17 +0800[diff] [blame]30CONFIG_SPI_FLASH=y
31CONFIG_SPI_FLASH_ATMEL=y
32CONFIG_SPI_FLASH_STMICRO=y
Tom Rinica22e962017-08-07 22:00:34 -0400[diff] [blame]33CONFIG_PHY_GIGE=y
Feng Li39e112d2016-11-03 14:15:17 +0800[diff] [blame]34CONFIG_E1000=y
Adam Ford53705472018-07-20 23:03:57 -0500[diff] [blame]35CONFIG_MII=y
Mario Sixda4fc932018-03-28 14:38:18 +0200[diff] [blame]36CONFIG_TSEC_ENET=y
Minghuan Lianc114aac2016-12-13 14:54:18 +0800[diff] [blame]37CONFIG_PCI=y
38CONFIG_DM_PCI=y
39CONFIG_DM_PCI_COMPAT=y
40CONFIG_PCIE_LAYERSCAPE=y
Peng Ma99503ac2019-01-30 19:19:40 +0800[diff] [blame]41CONFIG_DM_SCSI=y
Patrick Delaunay73287092017-01-27 11:00:42 +0100[diff] [blame]42CONFIG_SYS_NS16550=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]43CONFIG_SPI=y
Patrick Delaunay73287092017-01-27 11:00:42 +0100[diff] [blame]44CONFIG_DM_SPI=y
45CONFIG_FSL_DSPI=y
46CONFIG_FSL_QSPI=y
Tom Rini504997e2017-08-25 17:50:26 -0400[diff] [blame]47CONFIG_USB=y
48CONFIG_USB_XHCI_HCD=y
49CONFIG_USB_XHCI_DWC3=y