blob: eb639cd0d07049a6f731910845720e6af6dddd78 [file] [log] [blame]
Peter Robinson0b437a02022-12-31 09:24:00 +00001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2016 Rockchip Electronics Co., Ltd
4 * (C) Copyright 2022 Peter Robinson <pbrobinson at gmail.com>
5 */
6
7#include <common.h>
8#include <dm.h>
9#include <init.h>
10#include <syscon.h>
11#include <asm/io.h>
12#include <asm/arch-rockchip/clock.h>
13#include <asm/arch-rockchip/grf_rk3399.h>
14#include <asm/arch-rockchip/hardware.h>
15#include <asm/arch-rockchip/misc.h>
16#include <power/regulator.h>
17
18#define GRF_IO_VSEL_BT565_SHIFT 0
19#define PMUGRF_CON0_VSEL_SHIFT 8
20
21#ifndef CONFIG_SPL_BUILD
22int board_early_init_f(void)
23{
24 struct udevice *regulator;
25 int ret;
26
27 ret = regulator_get_by_platname("vcc5v0_usb", &regulator);
28 if (ret) {
29 pr_debug("%s vcc5v0_usb init fail! ret %d\n", __func__, ret);
30 goto out;
31 }
32
33 ret = regulator_set_enable(regulator, true);
34 if (ret)
35 pr_debug("%s vcc5v0-host-en-gpio set fail! ret %d\n", __func__, ret);
36
37out:
38 return 0;
39}
40#endif
41
42#ifdef CONFIG_MISC_INIT_R
43static void setup_iodomain(void)
44{
45 struct rk3399_grf_regs *grf =
46 syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
47 struct rk3399_pmugrf_regs *pmugrf =
48 syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
49
50 /* BT565 is in 1.8v domain */
51 rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_BT565_SHIFT);
52
53 /* Set GPIO1 1.8v/3.0v source select to PMU1830_VOL */
54 rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT);
55}
56
57int misc_init_r(void)
58{
59 const u32 cpuid_offset = 0x7;
60 const u32 cpuid_length = 0x10;
61 u8 cpuid[cpuid_length];
62 int ret;
63
64 setup_iodomain();
65
66 ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid);
67 if (ret)
68 return ret;
69
70 ret = rockchip_cpuid_set(cpuid, cpuid_length);
71 if (ret)
72 return ret;
73
74 return ret;
75}
76#endif