| Bernhard Messerklinger | dc49023 | 2022-08-25 08:54:01 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright (C) 2022 B&R Industrial Automation GmbH - |
| 4 | * https://www.br-automation.com/ |
| 5 | */ |
| 6 | |
| 7 | / { |
| 8 | ocp { |
| 9 | u-boot,dm-pre-reloc; |
| 10 | }; |
| 11 | }; |
| 12 | |
| 13 | &l4_wkup { |
| 14 | u-boot,dm-pre-reloc; |
| 15 | segment@200000 { |
| 16 | u-boot,dm-pre-reloc; |
| 17 | target-module@0 |
| 18 | { |
| 19 | u-boot,dm-pre-reloc; |
| 20 | compatible = "simple-bus"; |
| 21 | }; |
| 22 | target-module@7000 { |
| 23 | u-boot,dm-pre-reloc; |
| 24 | compatible = "simple-bus"; |
| 25 | }; |
| 26 | target-module@9000 { |
| 27 | u-boot,dm-pre-reloc; |
| 28 | compatible = "simple-bus"; |
| 29 | }; |
| 30 | }; |
| 31 | }; |
| 32 | |
| 33 | &wkup_cm { |
| 34 | u-boot,dm-pre-reloc; |
| 35 | }; |
| 36 | |
| 37 | &l4_wkup_clkctrl { |
| 38 | u-boot,dm-pre-reloc; |
| 39 | }; |
| 40 | |
| 41 | &l4_per { |
| 42 | u-boot,dm-pre-reloc; |
| 43 | segment@0 { |
| 44 | u-boot,dm-pre-reloc; |
| 45 | compatible = "simple-bus"; |
| 46 | target-module@4c000 { |
| 47 | u-boot,dm-pre-reloc; |
| 48 | compatible = "simple-bus"; |
| 49 | }; |
| 50 | }; |
| 51 | |
| 52 | segment@100000 { |
| 53 | u-boot,dm-pre-reloc; |
| 54 | compatible = "simple-bus"; |
| 55 | target-module@ac000 { |
| 56 | u-boot,dm-pre-reloc; |
| 57 | compatible = "simple-bus"; |
| 58 | }; |
| 59 | target-module@ae000 { |
| 60 | u-boot,dm-pre-reloc; |
| 61 | compatible = "simple-bus"; |
| 62 | }; |
| 63 | }; |
| 64 | }; |
| 65 | |
| 66 | &prcm { |
| 67 | u-boot,dm-pre-reloc; |
| 68 | }; |
| 69 | |
| 70 | &gpio0_target { |
| 71 | u-boot,dm-pre-reloc; |
| 72 | }; |
| 73 | |
| 74 | &prcm_clocks { |
| 75 | compatible = "simple-bus"; |
| 76 | }; |
| 77 | |
| 78 | &scm_clocks { |
| 79 | compatible = "simple-bus"; |
| 80 | }; |
| Bernhard Messerklinger | efcf542 | 2022-08-25 08:54:02 +0200 | [diff] [blame] | 81 | |
| 82 | &i2c0 { |
| 83 | u-boot,dm-pre-reloc; |
| 84 | }; |
| 85 | |
| 86 | &uart0 { |
| 87 | u-boot,dm-pre-reloc; |
| 88 | }; |
| 89 | |
| 90 | &mmc1 { |
| 91 | u-boot,dm-pre-reloc; |
| 92 | }; |
| 93 | |
| 94 | &mmc2 { |
| 95 | u-boot,dm-pre-reloc; |
| 96 | }; |
| 97 | |
| 98 | &gpio0 { |
| 99 | u-boot,dm-pre-reloc; |
| 100 | }; |
| 101 | |
| 102 | &gpio1 { |
| 103 | u-boot,dm-pre-reloc; |
| 104 | }; |
| 105 | |
| 106 | &gpio2 { |
| 107 | u-boot,dm-pre-reloc; |
| 108 | }; |
| 109 | |
| 110 | &gpio3 { |
| 111 | u-boot,dm-pre-reloc; |
| 112 | }; |