blob: c585710824cce08cb9a0fcba2fb957f0591ce425 [file] [log] [blame]
Simon Glass509805b2015-01-27 22:13:39 -07001/*
2 * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <common.h>
8#include <errno.h>
9#include <asm/io.h>
10#include <asm/post.h>
11#include <asm/processor.h>
12#include <asm/fsp/fsp_support.h>
13
Simon Glassdaa93d92015-07-31 09:31:31 -060014DECLARE_GLOBAL_DATA_PTR;
15
Simon Glass509805b2015-01-27 22:13:39 -070016int print_cpuinfo(void)
17{
18 post_code(POST_CPU_INFO);
19 return default_print_cpuinfo();
20}
21
Simon Glass509805b2015-01-27 22:13:39 -070022int board_pci_post_scan(struct pci_controller *hose)
23{
24 u32 status;
25
26 /* call into FspNotify */
27 debug("Calling into FSP (notify phase INIT_PHASE_PCI): ");
28 status = fsp_notify(NULL, INIT_PHASE_PCI);
29 if (status != FSP_SUCCESS)
30 debug("fail, error code %x\n", status);
31 else
32 debug("OK\n");
33
34 return 0;
35}
36
37void board_final_cleanup(void)
38{
39 u32 status;
40
41 /* call into FspNotify */
42 debug("Calling into FSP (notify phase INIT_PHASE_BOOT): ");
43 status = fsp_notify(NULL, INIT_PHASE_BOOT);
44 if (status != FSP_SUCCESS)
45 debug("fail, error code %x\n", status);
46 else
47 debug("OK\n");
48
49 return;
50}
Bin Mengd560c5c2015-06-07 11:33:14 +080051
52int x86_fsp_init(void)
53{
54 if (!gd->arch.hob_list)
55 fsp_init(CONFIG_FSP_TEMP_RAM_ADDR, BOOT_FULL_CONFIG, NULL);
56
57 return 0;
58}