| Nobuhiro Iwamatsu | 73bbe6d | 2012-01-11 10:45:01 +0900 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2008, 2011 Renesas Solutions Corp. |
| 3 | * |
| 4 | * SH7734 Internal I/O register |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License as |
| 8 | * published by the Free Software Foundation; either version 2 of |
| 9 | * the License, or (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 19 | * MA 02111-1307 USA |
| 20 | */ |
| 21 | |
| 22 | #ifndef _ASM_CPU_SH7734_H_ |
| 23 | #define _ASM_CPU_SH7734_H_ |
| 24 | |
| 25 | #define CCR 0xFF00001C |
| 26 | |
| 27 | #define CACHE_OC_NUM_WAYS 4 |
| 28 | #define CCR_CACHE_INIT 0x0000090d |
| 29 | |
| 30 | /* SCIF */ |
| 31 | #define SCIF0_BASE 0xFFE40000 |
| 32 | #define SCIF1_BASE 0xFFE41000 |
| 33 | #define SCIF2_BASE 0xFFE42000 |
| 34 | #define SCIF3_BASE 0xFFE43000 |
| 35 | #define SCIF4_BASE 0xFFE44000 |
| 36 | #define SCIF5_BASE 0xFFE45000 |
| 37 | |
| 38 | /* Timer */ |
| 39 | #define TSTR 0xFFD80004 |
| 40 | #define TCNT0 0xFFD8000C |
| 41 | #define TCR0 0xFFD80010 |
| 42 | |
| Nobuhiro Iwamatsu | fa65164 | 2012-05-09 16:00:01 +0900 | [diff] [blame^] | 43 | /* PFC */ |
| 44 | #define PMMR (0xFFFC0000) |
| 45 | #define MODESEL0 (0xFFFC004C) |
| 46 | #define MODESEL2 (MODESEL0 + 0x4) |
| 47 | #define MODESEL2_INIT (0x00003000) |
| 48 | |
| 49 | #define IPSR0 (0xFFFC001C) |
| 50 | #define IPSR1 (IPSR0 + 0x4) |
| 51 | #define IPSR2 (IPSR0 + 0x8) |
| 52 | #define IPSR3 (IPSR0 + 0xC) |
| 53 | #define IPSR4 (IPSR0 + 0x10) |
| 54 | #define IPSR5 (IPSR0 + 0x14) |
| 55 | #define IPSR6 (IPSR0 + 0x18) |
| 56 | #define IPSR7 (IPSR0 + 0x1C) |
| 57 | #define IPSR8 (IPSR0 + 0x20) |
| 58 | #define IPSR9 (IPSR0 + 0x24) |
| 59 | #define IPSR10 (IPSR0 + 0x28) |
| 60 | #define IPSR11 (IPSR0 + 0x2C) |
| 61 | |
| 62 | #define GPSR0 (0xFFFC0004) |
| 63 | #define GPSR1 (GPSR0 + 0x4) |
| 64 | #define GPSR2 (GPSR0 + 0x8) |
| 65 | #define GPSR3 (GPSR0 + 0xC) |
| 66 | #define GPSR4 (GPSR0 + 0x10) |
| 67 | #define GPSR5 (GPSR0 + 0x14) |
| 68 | |
| 69 | |
| Nobuhiro Iwamatsu | 73bbe6d | 2012-01-11 10:45:01 +0900 | [diff] [blame] | 70 | #endif /* _ASM_CPU_SH7734_H_ */ |