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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Thomas Choufb798b12015-10-09 13:46:34 +08002/*
3 * Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw>
Thomas Choufb798b12015-10-09 13:46:34 +08004 */
5
Patrick Delaunay81313352021-04-27 11:02:19 +02006#define LOG_CATEGORY UCLASS_TIMER
7
Sean Andersond1113062020-10-04 21:39:52 -04008#include <clk.h>
Sean Anderson738ff532020-09-28 10:52:22 -04009#include <cpu.h>
Thomas Choufb798b12015-10-09 13:46:34 +080010#include <dm.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060011#include <asm/global_data.h>
Mugunthan V N6f89d042016-01-16 21:33:58 +053012#include <dm/lists.h>
Sean Andersond1113062020-10-04 21:39:52 -040013#include <dm/device_compat.h>
Mugunthan V N6f89d042016-01-16 21:33:58 +053014#include <dm/device-internal.h>
Philipp Tomsich617fd622017-09-11 22:04:10 +020015#include <dm/root.h>
Thomas Choufb798b12015-10-09 13:46:34 +080016#include <errno.h>
Sean Andersond1113062020-10-04 21:39:52 -040017#include <init.h>
Thomas Choufb798b12015-10-09 13:46:34 +080018#include <timer.h>
Simon Glassd66c5f72020-02-03 07:36:15 -070019#include <linux/err.h>
Ovidiu Panait95339312022-10-12 08:36:55 +030020#include <relocate.h>
Thomas Choufb798b12015-10-09 13:46:34 +080021
Bin Mengf786c642015-11-13 00:11:15 -080022DECLARE_GLOBAL_DATA_PTR;
23
Thomas Choufb798b12015-10-09 13:46:34 +080024/*
Bin Meng8a7b8642015-11-13 00:11:14 -080025 * Implement a timer uclass to work with lib/time.c. The timer is usually
Bin Mengab841b62015-11-24 13:31:17 -070026 * a 32/64 bits free-running up counter. The get_rate() method is used to get
Thomas Choufb798b12015-10-09 13:46:34 +080027 * the input clock frequency of the timer. The get_count() method is used
Bin Mengab841b62015-11-24 13:31:17 -070028 * to get the current 64 bits count value. If the hardware is counting down,
Thomas Choufb798b12015-10-09 13:46:34 +080029 * the value should be inversed inside the method. There may be no real
30 * tick, and no timer interrupt.
31 */
32
Simon Glass04cb14c2016-02-24 09:14:48 -070033int notrace timer_get_count(struct udevice *dev, u64 *count)
Thomas Choufb798b12015-10-09 13:46:34 +080034{
Ovidiu Panait49e17df2022-10-12 08:36:54 +030035 struct timer_ops *ops = timer_get_ops(dev);
Thomas Choufb798b12015-10-09 13:46:34 +080036
37 if (!ops->get_count)
38 return -ENOSYS;
39
Sean Anderson947fc2d2020-10-07 14:37:44 -040040 *count = ops->get_count(dev);
41 return 0;
Thomas Choufb798b12015-10-09 13:46:34 +080042}
43
Simon Glass04cb14c2016-02-24 09:14:48 -070044unsigned long notrace timer_get_rate(struct udevice *dev)
Thomas Choufb798b12015-10-09 13:46:34 +080045{
Simon Glass95588622020-12-22 19:30:28 -070046 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
Thomas Choufb798b12015-10-09 13:46:34 +080047
48 return uc_priv->clock_rate;
49}
50
Bin Mengf786c642015-11-13 00:11:15 -080051static int timer_pre_probe(struct udevice *dev)
52{
Simon Glass6d70ba02021-08-07 07:24:06 -060053 if (CONFIG_IS_ENABLED(OF_REAL)) {
54 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
55 struct clk timer_clk;
56 int err;
57 ulong ret;
Bin Mengf786c642015-11-13 00:11:15 -080058
Simon Glass6d70ba02021-08-07 07:24:06 -060059 /*
60 * It is possible that a timer device has a null ofnode
61 */
62 if (!dev_has_ofnode(dev))
63 return 0;
Bin Mengfe5eb092019-07-05 09:23:15 -070064
Simon Glass6d70ba02021-08-07 07:24:06 -060065 err = clk_get_by_index(dev, 0, &timer_clk);
66 if (!err) {
67 ret = clk_get_rate(&timer_clk);
Alex Beef65b9ed2023-11-14 22:11:27 +010068 if (!IS_ERR_VALUE(ret)) {
69 uc_priv->clock_rate = ret;
70 return 0;
71 }
Simon Glass6d70ba02021-08-07 07:24:06 -060072 }
Alex Beef65b9ed2023-11-14 22:11:27 +010073
74 uc_priv->clock_rate = dev_read_u32_default(dev, "clock-frequency", 0);
Philipp Tomsich617fd622017-09-11 22:04:10 +020075 }
Bin Mengf786c642015-11-13 00:11:15 -080076
77 return 0;
78}
79
Stephen Warren023ddfe2016-01-06 10:33:03 -070080static int timer_post_probe(struct udevice *dev)
81{
82 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
83
84 if (!uc_priv->clock_rate)
85 return -EINVAL;
86
87 return 0;
88}
89
Simon Glass2f002162021-03-15 18:11:18 +130090#if CONFIG_IS_ENABLED(CPU)
Sean Anderson738ff532020-09-28 10:52:22 -040091int timer_timebase_fallback(struct udevice *dev)
92{
93 struct udevice *cpu;
Simon Glassb75b15b2020-12-03 16:55:23 -070094 struct cpu_plat *cpu_plat;
Sean Anderson738ff532020-09-28 10:52:22 -040095 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
96
97 /* Did we get our clock rate from the device tree? */
98 if (uc_priv->clock_rate)
99 return 0;
100
101 /* Fall back to timebase-frequency */
102 dev_dbg(dev, "missing clocks or clock-frequency property; falling back on timebase-frequency\n");
103 cpu = cpu_get_current_dev();
104 if (!cpu)
105 return -ENODEV;
106
Simon Glass71fa5b42020-12-03 16:55:18 -0700107 cpu_plat = dev_get_parent_plat(cpu);
Sean Anderson738ff532020-09-28 10:52:22 -0400108 if (!cpu_plat)
109 return -ENODEV;
110
111 uc_priv->clock_rate = cpu_plat->timebase_freq;
112 return 0;
113}
114#endif
115
Bin Mengab841b62015-11-24 13:31:17 -0700116u64 timer_conv_64(u32 count)
117{
118 /* increment tbh if tbl has rolled over */
119 if (count < gd->timebase_l)
120 gd->timebase_h++;
121 gd->timebase_l = count;
122 return ((u64)gd->timebase_h << 32) | gd->timebase_l;
123}
124
Simon Glass7c1974b2023-01-15 14:15:42 -0700125int dm_timer_init(void)
Mugunthan V N6f89d042016-01-16 21:33:58 +0530126{
Mugunthan V N6f89d042016-01-16 21:33:58 +0530127 struct udevice *dev = NULL;
Philipp Tomsich617fd622017-09-11 22:04:10 +0200128 __maybe_unused ofnode node;
Mugunthan V N6f89d042016-01-16 21:33:58 +0530129 int ret;
130
131 if (gd->timer)
132 return 0;
133
Philipp Tomsich63cf24a2017-09-11 22:04:11 +0200134 /*
135 * Directly access gd->dm_root to suppress error messages, if the
136 * virtual root driver does not yet exist.
137 */
138 if (gd->dm_root == NULL)
139 return -EAGAIN;
140
Simon Glass6d70ba02021-08-07 07:24:06 -0600141 if (CONFIG_IS_ENABLED(OF_REAL)) {
142 /* Check for a chosen timer to be used for tick */
143 node = ofnode_get_chosen_node("tick-timer");
Philipp Tomsich617fd622017-09-11 22:04:10 +0200144
Simon Glass6d70ba02021-08-07 07:24:06 -0600145 if (ofnode_valid(node) &&
146 uclass_get_device_by_ofnode(UCLASS_TIMER, node, &dev)) {
147 /*
148 * If the timer is not marked to be bound before
149 * relocation, bind it anyway.
150 */
Tom Rini5a6815b2021-10-12 12:01:00 -0400151 if (!lists_bind_fdt(dm_root(), node, &dev, NULL, false)) {
Simon Glass6d70ba02021-08-07 07:24:06 -0600152 ret = device_probe(dev);
153 if (ret)
154 return ret;
155 }
Philipp Tomsich617fd622017-09-11 22:04:10 +0200156 }
157 }
Philipp Tomsich617fd622017-09-11 22:04:10 +0200158
159 if (!dev) {
160 /* Fall back to the first available timer */
Simon Glassc7298e72016-02-11 13:23:26 -0700161 ret = uclass_first_device_err(UCLASS_TIMER, &dev);
Mugunthan V N6f89d042016-01-16 21:33:58 +0530162 if (ret)
163 return ret;
Mugunthan V N6f89d042016-01-16 21:33:58 +0530164 }
165
166 if (dev) {
167 gd->timer = dev;
168 return 0;
169 }
170
171 return -ENODEV;
172}
173
Thomas Choufb798b12015-10-09 13:46:34 +0800174UCLASS_DRIVER(timer) = {
175 .id = UCLASS_TIMER,
176 .name = "timer",
Bin Mengf786c642015-11-13 00:11:15 -0800177 .pre_probe = timer_pre_probe,
Mugunthan V N5d0f01f2015-12-24 16:08:06 +0530178 .flags = DM_UC_FLAG_SEQ_ALIAS,
Stephen Warren023ddfe2016-01-06 10:33:03 -0700179 .post_probe = timer_post_probe,
Simon Glass8a2b47f2020-12-03 16:55:17 -0700180 .per_device_auto = sizeof(struct timer_dev_priv),
Thomas Choufb798b12015-10-09 13:46:34 +0800181};