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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Matthias Fuchs6f60bf32007-12-27 16:55:17 +01002/*
3 * (C) Copyright 2007
4 * Matthias Fuchs, esd gmbh, matthias.fuchs@esd-electronics.com.
Matthias Fuchs6f60bf32007-12-27 16:55:17 +01005 */
6
7/*
8 * Epson RX8025 RTC driver.
9 */
10
Matthias Fuchs6f60bf32007-12-27 16:55:17 +010011#include <command.h>
Heiko Schocherb11a14a2019-07-16 05:31:35 +020012#include <dm.h>
Matthias Fuchs6f60bf32007-12-27 16:55:17 +010013#include <i2c.h>
Heiko Schocherb11a14a2019-07-16 05:31:35 +020014#include <rtc.h>
Matthias Fuchs6f60bf32007-12-27 16:55:17 +010015
Matthias Fuchs6f60bf32007-12-27 16:55:17 +010016/*---------------------------------------------------------------------*/
17#undef DEBUG_RTC
18
19#ifdef DEBUG_RTC
20#define DEBUGR(fmt,args...) printf(fmt ,##args)
21#else
22#define DEBUGR(fmt,args...)
23#endif
24/*---------------------------------------------------------------------*/
25
Mathew McBridef36e6c72021-09-17 06:46:02 +000026enum rx_model {
27 model_rx_8025,
28 model_rx_8035,
29};
30
Matthias Fuchs6f60bf32007-12-27 16:55:17 +010031/*
32 * RTC register addresses
33 */
34#define RTC_SEC_REG_ADDR 0x00
35#define RTC_MIN_REG_ADDR 0x01
36#define RTC_HR_REG_ADDR 0x02
37#define RTC_DAY_REG_ADDR 0x03
38#define RTC_DATE_REG_ADDR 0x04
39#define RTC_MON_REG_ADDR 0x05
40#define RTC_YR_REG_ADDR 0x06
Mathew McBridef096e2d2021-09-17 06:46:03 +000041#define RTC_OFFSET_REG_ADDR 0x07
Matthias Fuchs6f60bf32007-12-27 16:55:17 +010042
43#define RTC_CTL1_REG_ADDR 0x0e
44#define RTC_CTL2_REG_ADDR 0x0f
45
46/*
47 * Control register 1 bits
48 */
49#define RTC_CTL1_BIT_2412 0x20
50
51/*
52 * Control register 2 bits
53 */
54#define RTC_CTL2_BIT_PON 0x10
55#define RTC_CTL2_BIT_VDET 0x40
56#define RTC_CTL2_BIT_XST 0x20
57#define RTC_CTL2_BIT_VDSL 0x80
58
59/*
60 * Note: the RX8025 I2C RTC requires register
61 * reads and write to consist of a single bus
62 * cycle. It is not allowed to write the register
63 * address in a first cycle that is terminated by
64 * a STOP condition. The chips needs a 'restart'
65 * sequence (start sequence without a prior stop).
Matthias Fuchs6f60bf32007-12-27 16:55:17 +010066 */
67
Heiko Schocherb11a14a2019-07-16 05:31:35 +020068#define rtc_read(reg) buf[(reg) & 0xf]
Matthias Fuchs6f60bf32007-12-27 16:55:17 +010069
Mathew McBride25026cb2021-09-17 06:46:01 +000070static int rtc_write(struct udevice *dev, uchar reg, uchar val);
Matthias Fuchs6f60bf32007-12-27 16:55:17 +010071
Mathew McBridef36e6c72021-09-17 06:46:02 +000072static int rx8025_is_osc_stopped(enum rx_model model, int ctrl2)
73{
74 int xstp = ctrl2 & RTC_CTL2_BIT_XST;
75 /* XSTP bit has different polarity on RX-8025 vs RX-8035.
76 * RX-8025: 0 == oscillator stopped
77 * RX-8035: 1 == oscillator stopped
78 */
79
80 if (model == model_rx_8025)
81 xstp = !xstp;
82
83 return xstp;
84}
85
Matthias Fuchs6f60bf32007-12-27 16:55:17 +010086/*
87 * Get the current time from the RTC
88 */
Mathew McBride25026cb2021-09-17 06:46:01 +000089static int rx8025_rtc_get(struct udevice *dev, struct rtc_time *tmp)
Matthias Fuchs6f60bf32007-12-27 16:55:17 +010090{
Yuri Tikhonov9bacd942008-03-20 17:56:04 +030091 int rel = 0;
Matthias Fuchs6f60bf32007-12-27 16:55:17 +010092 uchar sec, min, hour, mday, wday, mon, year, ctl2;
93 uchar buf[16];
94
Heiko Schocherb11a14a2019-07-16 05:31:35 +020095 if (dm_i2c_read(dev, 0, buf, sizeof(buf))) {
Matthias Fuchs6f60bf32007-12-27 16:55:17 +010096 printf("Error reading from RTC\n");
Heiko Schocherb11a14a2019-07-16 05:31:35 +020097 return -EIO;
98 }
Matthias Fuchs6f60bf32007-12-27 16:55:17 +010099
100 sec = rtc_read(RTC_SEC_REG_ADDR);
101 min = rtc_read(RTC_MIN_REG_ADDR);
102 hour = rtc_read(RTC_HR_REG_ADDR);
103 wday = rtc_read(RTC_DAY_REG_ADDR);
104 mday = rtc_read(RTC_DATE_REG_ADDR);
105 mon = rtc_read(RTC_MON_REG_ADDR);
106 year = rtc_read(RTC_YR_REG_ADDR);
107
Heiko Schocher6b659d02019-07-16 05:31:34 +0200108 DEBUGR("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
109 "hr: %02x min: %02x sec: %02x\n",
110 year, mon, mday, wday, hour, min, sec);
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100111
112 /* dump status */
113 ctl2 = rtc_read(RTC_CTL2_REG_ADDR);
Yuri Tikhonov9bacd942008-03-20 17:56:04 +0300114 if (ctl2 & RTC_CTL2_BIT_PON) {
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100115 printf("RTC: power-on detected\n");
Yuri Tikhonov9bacd942008-03-20 17:56:04 +0300116 rel = -1;
117 }
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100118
Yuri Tikhonov9bacd942008-03-20 17:56:04 +0300119 if (ctl2 & RTC_CTL2_BIT_VDET) {
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100120 printf("RTC: voltage drop detected\n");
Yuri Tikhonov9bacd942008-03-20 17:56:04 +0300121 rel = -1;
122 }
Mathew McBridef36e6c72021-09-17 06:46:02 +0000123 if (rx8025_is_osc_stopped(dev->driver_data, ctl2)) {
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100124 printf("RTC: oscillator stop detected\n");
Yuri Tikhonov9bacd942008-03-20 17:56:04 +0300125 rel = -1;
126 }
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100127
Heiko Schocher6b659d02019-07-16 05:31:34 +0200128 tmp->tm_sec = bcd2bin(sec & 0x7F);
129 tmp->tm_min = bcd2bin(min & 0x7F);
Yuri Tikhonov62a34592008-08-15 15:42:09 +0200130 if (rtc_read(RTC_CTL1_REG_ADDR) & RTC_CTL1_BIT_2412)
Heiko Schocher6b659d02019-07-16 05:31:34 +0200131 tmp->tm_hour = bcd2bin(hour & 0x3F);
Yuri Tikhonov62a34592008-08-15 15:42:09 +0200132 else
Heiko Schocher6b659d02019-07-16 05:31:34 +0200133 tmp->tm_hour = bcd2bin(hour & 0x1F) % 12 +
Yuri Tikhonov62a34592008-08-15 15:42:09 +0200134 ((hour & 0x20) ? 12 : 0);
Heiko Schocher6b659d02019-07-16 05:31:34 +0200135
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100136 tmp->tm_mday = bcd2bin (mday & 0x3F);
137 tmp->tm_mon = bcd2bin (mon & 0x1F);
138 tmp->tm_year = bcd2bin (year) + ( bcd2bin (year) >= 70 ? 1900 : 2000);
139 tmp->tm_wday = bcd2bin (wday & 0x07);
140 tmp->tm_yday = 0;
141 tmp->tm_isdst= 0;
142
Heiko Schocher6b659d02019-07-16 05:31:34 +0200143 DEBUGR("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
144 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
145 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
Yuri Tikhonov9bacd942008-03-20 17:56:04 +0300146
147 return rel;
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100148}
149
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100150/*
151 * Set the RTC
152 */
Mathew McBride25026cb2021-09-17 06:46:01 +0000153static int rx8025_rtc_set(struct udevice *dev, const struct rtc_time *tmp)
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100154{
Mathew McBridef096e2d2021-09-17 06:46:03 +0000155 /* To work around the read/write cycle issue mentioned
156 * at the top of this file, write all the time registers
157 * in one I2C transaction
158 */
159 u8 write_op[8];
160
161 /* 2412 flag must be set before doing a RTC write,
162 * otherwise the seconds and minute register
163 * will be cleared when the flag is set
164 */
165 if (rtc_write(dev, RTC_CTL1_REG_ADDR, RTC_CTL1_BIT_2412))
166 return -EIO;
167
Heiko Schocher6b659d02019-07-16 05:31:34 +0200168 DEBUGR("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
169 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
170 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100171
172 if (tmp->tm_year < 1970 || tmp->tm_year > 2069)
173 printf("WARNING: year should be between 1970 and 2069!\n");
174
Mathew McBridef096e2d2021-09-17 06:46:03 +0000175 write_op[RTC_SEC_REG_ADDR] = bin2bcd(tmp->tm_sec);
176 write_op[RTC_MIN_REG_ADDR] = bin2bcd(tmp->tm_min);
177 write_op[RTC_HR_REG_ADDR] = bin2bcd(tmp->tm_hour);
178 write_op[RTC_DAY_REG_ADDR] = bin2bcd(tmp->tm_wday);
179 write_op[RTC_DATE_REG_ADDR] = bin2bcd(tmp->tm_mday);
180 write_op[RTC_MON_REG_ADDR] = bin2bcd(tmp->tm_mon);
181 write_op[RTC_YR_REG_ADDR] = bin2bcd(tmp->tm_year % 100);
182 write_op[RTC_OFFSET_REG_ADDR] = 0;
Heiko Schocherb11a14a2019-07-16 05:31:35 +0200183
Mathew McBridef096e2d2021-09-17 06:46:03 +0000184 return dm_i2c_write(dev, 0, &write_op[0], 8);
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100185}
186
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100187/*
Chris Packham7c105e42018-03-21 15:40:37 +1300188 * Reset the RTC
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100189 */
Mathew McBride25026cb2021-09-17 06:46:01 +0000190static int rx8025_rtc_reset(struct udevice *dev)
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100191{
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100192 uchar buf[16];
193 uchar ctl2;
194
Heiko Schocherb11a14a2019-07-16 05:31:35 +0200195 if (dm_i2c_read(dev, 0, buf, sizeof(buf))) {
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100196 printf("Error reading from RTC\n");
Heiko Schocherb11a14a2019-07-16 05:31:35 +0200197 return -EIO;
198 }
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100199
200 ctl2 = rtc_read(RTC_CTL2_REG_ADDR);
201 ctl2 &= ~(RTC_CTL2_BIT_PON | RTC_CTL2_BIT_VDET);
Mathew McBridef36e6c72021-09-17 06:46:02 +0000202
203 if (dev->driver_data == model_rx_8035)
204 ctl2 &= ~(RTC_CTL2_BIT_XST);
205 else
206 ctl2 |= RTC_CTL2_BIT_XST;
Heiko Schocherb11a14a2019-07-16 05:31:35 +0200207
208 return rtc_write(dev, RTC_CTL2_REG_ADDR, ctl2);
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100209}
210
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100211/*
212 * Helper functions
213 */
Mathew McBride25026cb2021-09-17 06:46:01 +0000214static int rtc_write(struct udevice *dev, uchar reg, uchar val)
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100215{
Mathew McBride32ff6e22021-09-17 06:46:04 +0000216 /* The RX8025/RX8035 uses the top 4 bits of the
217 * 'offset' byte as the start register address,
218 * and the bottom 4 bits as a 'transfer' mode setting
219 * (only applicable for reads)
220 */
221 u8 offset = (reg << 4);
Heiko Schocherb11a14a2019-07-16 05:31:35 +0200222
Mathew McBride32ff6e22021-09-17 06:46:04 +0000223 if (dm_i2c_reg_write(dev, offset, val)) {
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100224 printf("Error writing to RTC\n");
Heiko Schocherb11a14a2019-07-16 05:31:35 +0200225 return -EIO;
226 }
227
228 return 0;
229}
230
Heiko Schocherb11a14a2019-07-16 05:31:35 +0200231static int rx8025_probe(struct udevice *dev)
232{
233 uchar buf[16];
234 int ret = 0;
235
236 if (i2c_get_chip_offset_len(dev) != 1)
237 ret = i2c_set_chip_offset_len(dev, 1);
238
239 if (ret)
240 return ret;
241
242 return dm_i2c_read(dev, 0, buf, sizeof(buf));
Matthias Fuchs6f60bf32007-12-27 16:55:17 +0100243}
Heiko Schocherb11a14a2019-07-16 05:31:35 +0200244
245static const struct rtc_ops rx8025_rtc_ops = {
246 .get = rx8025_rtc_get,
247 .set = rx8025_rtc_set,
248 .reset = rx8025_rtc_reset,
249};
250
251static const struct udevice_id rx8025_rtc_ids[] = {
Mathew McBridef36e6c72021-09-17 06:46:02 +0000252 { .compatible = "epson,rx8025", .data = model_rx_8025 },
253 { .compatible = "epson,rx8035", .data = model_rx_8035 },
Heiko Schocherb11a14a2019-07-16 05:31:35 +0200254 { }
255};
256
Mathew McBridef36e6c72021-09-17 06:46:02 +0000257U_BOOT_DRIVER(rx8025_rtc) = {
Heiko Schocherb11a14a2019-07-16 05:31:35 +0200258 .name = "rx8025_rtc",
259 .id = UCLASS_RTC,
260 .probe = rx8025_probe,
261 .of_match = rx8025_rtc_ids,
262 .ops = &rx8025_rtc_ops,
263};