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Marek Behúnef2b6b12017-06-09 19:28:44 +02001/*
2 * I2C Driver for Atmel ATSHA204 over I2C
3 *
4 * Copyright (C) 2014 Josh Datko, Cryptotronix, jbd@cryptotronix.com
Wolfgang Denk62fb2b42021-09-27 17:42:39 +02005 * 2016 Tomas Hlavacek, CZ.NIC, tmshlvck@gmail.com
Marek Behúnd63726e2022-06-01 17:17:06 +02006 * 2017 Marek Behún, CZ.NIC, kabel@kernel.org
Marek Behúnef2b6b12017-06-09 19:28:44 +02007 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
Marek Behúnef2b6b12017-06-09 19:28:44 +020013#include <dm.h>
14#include <i2c.h>
15#include <errno.h>
16#include <atsha204a-i2c.h>
Simon Glass0f2af882020-05-10 11:40:05 -060017#include <log.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060018#include <asm/global_data.h>
Simon Glassdbd79542020-05-10 11:40:11 -060019#include <linux/delay.h>
Pali Rohár2e269302022-04-12 11:20:44 +020020#include <linux/bitrev.h>
Simon Glass48b6c6b2019-11-14 12:57:16 -070021#include <u-boot/crc.h>
Marek Behúnef2b6b12017-06-09 19:28:44 +020022
Paweł Anikiela47bfcb2022-06-17 12:47:21 +020023#define ATSHA204A_TWHI_US 2500
Marek Behúnef2b6b12017-06-09 19:28:44 +020024#define ATSHA204A_TRANSACTION_TIMEOUT 100000
25#define ATSHA204A_TRANSACTION_RETRY 5
26#define ATSHA204A_EXECTIME 5000
27
28DECLARE_GLOBAL_DATA_PTR;
29
Pali Rohár2e269302022-04-12 11:20:44 +020030static inline u16 atsha204a_crc16(const u8 *buffer, size_t len)
Marek Behúnef2b6b12017-06-09 19:28:44 +020031{
Pali Rohár2e269302022-04-12 11:20:44 +020032 return bitrev16(crc16(0, buffer, len));
Marek Behúnef2b6b12017-06-09 19:28:44 +020033}
34
Michał Barnaśb76526d2024-02-19 16:32:04 +000035static int atsha204a_ping_bus(struct udevice *dev)
36{
37 struct udevice *bus = dev_get_parent(dev);
38 struct i2c_msg msg;
39 int speed;
40 int res;
41 u8 val = 0;
42
43 speed = dm_i2c_get_bus_speed(bus);
44 if (speed != I2C_SPEED_STANDARD_RATE) {
45 int rv;
46
47 rv = dm_i2c_set_bus_speed(bus, I2C_SPEED_STANDARD_RATE);
48 if (rv)
49 debug("Couldn't change the I2C bus speed\n");
50 }
51
52 /*
53 * The I2C drivers don't support sending messages when NAK is received.
54 * This chip requires wake up low signal on SDA for >= 60us.
55 * To achieve this, we slow the bus to 100kHz and send an empty
56 * message to address 0. This will hold the SDA line low for the
57 * required time to wake up the chip.
58 */
59 msg.addr = 0;
60 msg.flags = I2C_M_STOP;
61 msg.len = sizeof(val);
62 msg.buf = &val;
63
64 res = dm_i2c_xfer(dev, &msg, 1);
65
66 if (speed != I2C_SPEED_STANDARD_RATE) {
67 int rv;
68
69 rv = dm_i2c_set_bus_speed(bus, speed);
70 if (rv)
71 debug("Couldn't restore the I2C bus speed\n");
72 }
73
74 return res;
75}
76
Marek Behúnef2b6b12017-06-09 19:28:44 +020077static int atsha204a_send(struct udevice *dev, const u8 *buf, u8 len)
78{
79 fdt_addr_t *priv = dev_get_priv(dev);
80 struct i2c_msg msg;
81
82 msg.addr = *priv;
83 msg.flags = I2C_M_STOP;
84 msg.len = len;
85 msg.buf = (u8 *) buf;
86
87 return dm_i2c_xfer(dev, &msg, 1);
88}
89
90static int atsha204a_recv(struct udevice *dev, u8 *buf, u8 len)
91{
92 fdt_addr_t *priv = dev_get_priv(dev);
93 struct i2c_msg msg;
94
95 msg.addr = *priv;
96 msg.flags = I2C_M_RD | I2C_M_STOP;
97 msg.len = len;
98 msg.buf = (u8 *) buf;
99
100 return dm_i2c_xfer(dev, &msg, 1);
101}
102
103static int atsha204a_recv_resp(struct udevice *dev,
104 struct atsha204a_resp *resp)
105{
106 int res;
107 u16 resp_crc, computed_crc;
108 u8 *p = (u8 *) resp;
109
110 res = atsha204a_recv(dev, p, 4);
111 if (res)
112 return res;
113
114 if (resp->length > 4) {
115 if (resp->length > sizeof(*resp))
116 return -EMSGSIZE;
117
118 res = atsha204a_recv(dev, p + 4, resp->length - 4);
119 if (res)
120 return res;
121 }
122
123 resp_crc = (u16) p[resp->length - 2]
124 | (((u16) p[resp->length - 1]) << 8);
125 computed_crc = atsha204a_crc16(p, resp->length - 2);
126
127 if (resp_crc != computed_crc) {
128 debug("Invalid checksum in ATSHA204A response\n");
129 return -EBADMSG;
130 }
131
132 return 0;
133}
134
135int atsha204a_wakeup(struct udevice *dev)
136{
Marek Behúnef2b6b12017-06-09 19:28:44 +0200137 struct atsha204a_resp resp;
Michał Barnaś3dfda0a2024-02-19 16:32:02 +0000138 int res;
Marek Behúnef2b6b12017-06-09 19:28:44 +0200139
140 debug("Waking up ATSHA204A\n");
141
Michał Barnaś3dfda0a2024-02-19 16:32:02 +0000142 /*
143 * The device ignores any levels or transitions on the SCL pin
144 * when the device is idle, asleep or during waking up.
145 * Don't check for error when waking up the device.
146 */
Michał Barnaśb76526d2024-02-19 16:32:04 +0000147 atsha204a_ping_bus(dev);
Marek Behúnef2b6b12017-06-09 19:28:44 +0200148
Michał Barnaśb76526d2024-02-19 16:32:04 +0000149 udelay(ATSHA204A_TWHI_US);
Marek Behúnef2b6b12017-06-09 19:28:44 +0200150
Michał Barnaś3dfda0a2024-02-19 16:32:02 +0000151 res = atsha204a_recv_resp(dev, &resp);
152 if (res) {
153 debug("failed on receiving response, ending\n");
154 return res;
155 }
Marek Behúnef2b6b12017-06-09 19:28:44 +0200156
Michał Barnaś3dfda0a2024-02-19 16:32:02 +0000157 if (resp.code != ATSHA204A_STATUS_AFTER_WAKE) {
158 debug("failed (response code = %02x), ending\n", resp.code);
159 return -EBADMSG;
Marek Behúnef2b6b12017-06-09 19:28:44 +0200160 }
161
Michał Barnaś3dfda0a2024-02-19 16:32:02 +0000162 debug("success\n");
163 return 0;
Marek Behúnef2b6b12017-06-09 19:28:44 +0200164}
165
166int atsha204a_idle(struct udevice *dev)
167{
168 int res;
169 u8 req = ATSHA204A_FUNC_IDLE;
170
171 res = atsha204a_send(dev, &req, 1);
172 if (res)
173 debug("Failed putting ATSHA204A idle\n");
174 return res;
175}
176
177int atsha204a_sleep(struct udevice *dev)
178{
179 int res;
Michał Barnaś7370cd32024-02-19 16:32:03 +0000180 u8 req = ATSHA204A_FUNC_SLEEP;
Marek Behúnef2b6b12017-06-09 19:28:44 +0200181
182 res = atsha204a_send(dev, &req, 1);
183 if (res)
184 debug("Failed putting ATSHA204A to sleep\n");
185 return res;
186}
187
188static int atsha204a_transaction(struct udevice *dev, struct atsha204a_req *req,
189 struct atsha204a_resp *resp)
190{
191 int res, timeout = ATSHA204A_TRANSACTION_TIMEOUT;
192
193 res = atsha204a_send(dev, (u8 *) req, req->length + 1);
194 if (res) {
195 debug("ATSHA204A transaction send failed\n");
196 return -EBUSY;
197 }
198
199 do {
Adrian Fiergolski9468ddb2022-01-11 19:05:30 +0100200 udelay(ATSHA204A_EXECTIME);
Marek Behúnef2b6b12017-06-09 19:28:44 +0200201 res = atsha204a_recv_resp(dev, resp);
202 if (!res || res == -EMSGSIZE || res == -EBADMSG)
203 break;
204
205 debug("ATSHA204A transaction polling for response "
206 "(timeout = %d)\n", timeout);
207
Marek Behúnef2b6b12017-06-09 19:28:44 +0200208 timeout -= ATSHA204A_EXECTIME;
209 } while (timeout > 0);
210
211 if (timeout <= 0) {
212 debug("ATSHA204A transaction timed out\n");
213 return -ETIMEDOUT;
214 }
215
216 return res;
217}
218
219static void atsha204a_req_crc32(struct atsha204a_req *req)
220{
221 u8 *p = (u8 *) req;
222 u16 computed_crc;
223 u16 *crc_ptr = (u16 *) &p[req->length - 1];
224
225 /* The buffer to crc16 starts at byte 1, not 0 */
226 computed_crc = atsha204a_crc16(p + 1, req->length - 2);
227
228 *crc_ptr = cpu_to_le16(computed_crc);
229}
230
231int atsha204a_read(struct udevice *dev, enum atsha204a_zone zone, bool read32,
232 u16 addr, u8 *buffer)
233{
234 int res, retry = ATSHA204A_TRANSACTION_RETRY;
235 struct atsha204a_req req;
236 struct atsha204a_resp resp;
237
238 req.function = ATSHA204A_FUNC_COMMAND;
239 req.length = 7;
240 req.command = ATSHA204A_CMD_READ;
241
242 req.param1 = (u8) zone;
243 if (read32)
244 req.param1 |= 0x80;
245
246 req.param2 = cpu_to_le16(addr);
247
248 atsha204a_req_crc32(&req);
249
250 do {
251 res = atsha204a_transaction(dev, &req, &resp);
252 if (!res)
253 break;
254
255 debug("ATSHA204A read retry (%d)\n", retry);
256 retry--;
257 atsha204a_wakeup(dev);
258 } while (retry >= 0);
Wolfgang Denk9d328a62021-09-27 17:42:38 +0200259
Marek Behúnef2b6b12017-06-09 19:28:44 +0200260 if (res) {
261 debug("ATSHA204A read failed\n");
262 return res;
263 }
264
265 if (resp.length != (read32 ? 32 : 4) + 3) {
266 debug("ATSHA204A read bad response length (%d)\n",
267 resp.length);
268 return -EBADMSG;
269 }
270
271 memcpy(buffer, ((u8 *) &resp) + 1, read32 ? 32 : 4);
272
273 return 0;
274}
275
276int atsha204a_get_random(struct udevice *dev, u8 *buffer, size_t max)
277{
278 int res;
279 struct atsha204a_req req;
280 struct atsha204a_resp resp;
281
282 req.function = ATSHA204A_FUNC_COMMAND;
283 req.length = 7;
284 req.command = ATSHA204A_CMD_RANDOM;
285
286 req.param1 = 1;
287 req.param2 = 0;
288
289 /* We do not have to compute the checksum dynamically */
290 req.data[0] = 0x27;
291 req.data[1] = 0x47;
292
293 res = atsha204a_transaction(dev, &req, &resp);
294 if (res) {
295 debug("ATSHA204A random transaction failed\n");
296 return res;
297 }
298
299 memcpy(buffer, ((u8 *) &resp) + 1, max >= 32 ? 32 : max);
300 return 0;
301}
302
Simon Glassaad29ae2020-12-03 16:55:21 -0700303static int atsha204a_of_to_plat(struct udevice *dev)
Marek Behúnef2b6b12017-06-09 19:28:44 +0200304{
305 fdt_addr_t *priv = dev_get_priv(dev);
306 fdt_addr_t addr;
307
Adrian Fiergolskibaa5f6a2022-01-11 19:05:31 +0100308 addr = dev_read_addr(dev);
Marek Behúnef2b6b12017-06-09 19:28:44 +0200309 if (addr == FDT_ADDR_T_NONE) {
310 debug("Can't get ATSHA204A I2C base address\n");
311 return -ENXIO;
312 }
313
314 *priv = addr;
315 return 0;
316}
317
318static const struct udevice_id atsha204a_ids[] = {
Pali Rohárb3372b02022-04-05 14:49:08 +0200319 { .compatible = "atmel,atsha204" },
Marek Behúnef2b6b12017-06-09 19:28:44 +0200320 { .compatible = "atmel,atsha204a" },
321 { }
322};
323
324U_BOOT_DRIVER(atsha204) = {
325 .name = "atsha204",
326 .id = UCLASS_MISC,
327 .of_match = atsha204a_ids,
Simon Glassaad29ae2020-12-03 16:55:21 -0700328 .of_to_plat = atsha204a_of_to_plat,
Simon Glass8a2b47f2020-12-03 16:55:17 -0700329 .priv_auto = sizeof(fdt_addr_t),
Marek Behúnef2b6b12017-06-09 19:28:44 +0200330};