Dinh Nguyen | c3364da | 2015-09-01 17:41:52 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2012 Altera Corporation <www.altera.com> |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | |
| 9 | #include <micrel.h> |
| 10 | #include <netdev.h> |
| 11 | #include <phy.h> |
| 12 | |
| 13 | DECLARE_GLOBAL_DATA_PTR; |
| 14 | |
| 15 | void s_init(void) {} |
| 16 | |
| 17 | /* |
| 18 | * Miscellaneous platform dependent initialisations |
| 19 | */ |
| 20 | int board_init(void) |
| 21 | { |
| 22 | /* Address of boot parameters for ATAG (if ATAG is used) */ |
| 23 | gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; |
| 24 | |
| 25 | return 0; |
| 26 | } |
| 27 | |
| 28 | /* |
| 29 | * PHY configuration |
| 30 | */ |
| 31 | #ifdef CONFIG_PHY_MICREL_KSZ9031 |
| 32 | int board_phy_config(struct phy_device *phydev) |
| 33 | { |
| 34 | int ret; |
| 35 | /* |
| 36 | * These skew settings for the KSZ9021 ethernet phy is required for ethernet |
| 37 | * to work reliably on most flavors of cyclone5 boards. |
| 38 | */ |
| 39 | ret = ksz9031_phy_extended_write(phydev, 0x2, |
| 40 | MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW, |
| 41 | MII_KSZ9031_MOD_DATA_NO_POST_INC, |
| 42 | 0x70); |
| 43 | if (ret) |
| 44 | return ret; |
| 45 | |
| 46 | ret = ksz9031_phy_extended_write(phydev, 0x2, |
| 47 | MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW, |
| 48 | MII_KSZ9031_MOD_DATA_NO_POST_INC, |
| 49 | 0x7777); |
| 50 | if (ret) |
| 51 | return ret; |
| 52 | |
| 53 | ret = ksz9031_phy_extended_write(phydev, 0x2, |
| 54 | MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW, |
| 55 | MII_KSZ9031_MOD_DATA_NO_POST_INC, |
| 56 | 0); |
| 57 | if (ret) |
| 58 | return ret; |
| 59 | |
| 60 | ret = ksz9031_phy_extended_write(phydev, 0x2, |
| 61 | MII_KSZ9031_EXT_RGMII_CLOCK_SKEW, |
| 62 | MII_KSZ9031_MOD_DATA_NO_POST_INC, |
| 63 | 0x03FC); |
| 64 | if (ret) |
| 65 | return ret; |
| 66 | |
| 67 | if (phydev->drv->config) |
| 68 | return phydev->drv->config(phydev); |
| 69 | |
| 70 | return 0; |
| 71 | } |
| 72 | #endif |