Blame - arch/arm/mach-zynq/Kconfig - filogic/uboot

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Masahiro Yamada	8204bd1	2015-03-16 16:43:24 +0900	[diff] [blame]	1	if ARCH_ZYNQ
Masahiro Yamada	a3cd898	2014-08-31 07:10:55 +0900	[diff] [blame]	2
Philipp Tomsich	2d6a0cc	2017-08-03 23:23:55 +0200	[diff] [blame]	3	config SPL_LDSCRIPT
				4	default "arch/arm/mach-zynq/u-boot-spl.lds"
				5
Tien Fong Chee	6fd0a71	2019-01-23 14:20:03 +0800	[diff] [blame]	6	config SPL_FS_FAT
Simon Glass	6172e2e	2016-09-12 23:18:38 -0600	[diff] [blame]	7	default y
				8
Simon Glass	f2a8946	2016-09-12 23:18:41 -0600	[diff] [blame]	9	config SPL_LIBCOMMON_SUPPORT
				10	default y
				11
Simon Glass	f6de257	2016-09-12 23:18:42 -0600	[diff] [blame]	12	config SPL_LIBDISK_SUPPORT
				13	default y
				14
Simon Glass	b16c92c	2016-09-12 23:18:43 -0600	[diff] [blame]	15	config SPL_LIBGENERIC_SUPPORT
				16	default y
				17
Simon Glass	b58bfe0	2021-08-08 12:20:09 -0600	[diff] [blame]	18	config SPL_MMC
Masahiro Yamada	168c57d	2017-01-30 19:46:51 +0900	[diff] [blame]	19	default y if MMC_SDHCI_ZYNQ
Simon Glass	bd58f1d	2016-09-12 23:18:44 -0600	[diff] [blame]	20
Simon Glass	f4d6039	2021-08-08 12:20:12 -0600	[diff] [blame]	21	config SPL_SERIAL
Simon Glass	e076d6f	2016-09-12 23:18:56 -0600	[diff] [blame]	22	default y
				23
Simon Glass	219d612	2016-09-12 23:18:57 -0600	[diff] [blame]	24	config SPL_SPI_FLASH_SUPPORT
				25	default y if ZYNQ_QSPI
				26
Simon Glass	a582047	2021-08-08 12:20:14 -0600	[diff] [blame]	27	config SPL_SPI
Simon Glass	b24fdca	2016-09-12 23:18:58 -0600	[diff] [blame]	28	default y if ZYNQ_QSPI
				29
Siva Durga Prasad Paladugu	d8e4e1c	2017-05-12 15:04:11 +0530	[diff] [blame]	30	config ZYNQ_DDRC_INIT
				31	bool "Zynq DDRC initialization"
				32	default y
				33	help
				34	This option used to perform DDR specific initialization
				35	if required. There might be cases like ddr less where we
				36	want to skip ddr init and this option is useful for it.
				37
Masahiro Yamada	a3cd898	2014-08-31 07:10:55 +0900	[diff] [blame]	38	config SYS_BOARD
Michal Simek	1f5642a	2018-03-04 16:15:15 +0100	[diff] [blame]	39	string "Board name"
Masahiro Yamada	a3cd898	2014-08-31 07:10:55 +0900	[diff] [blame]	40	default "zynq"
				41
				42	config SYS_VENDOR
Mike Looijmans	7d66606	2016-09-28 07:46:30 +0200	[diff] [blame]	43	string "Vendor name"
Masahiro Yamada	a3cd898	2014-08-31 07:10:55 +0900	[diff] [blame]	44	default "xilinx"
				45
				46	config SYS_SOC
Masahiro Yamada	a3cd898	2014-08-31 07:10:55 +0900	[diff] [blame]	47	default "zynq"
				48
				49	config SYS_CONFIG_NAME
Michal Simek	3917c4f	2016-05-20 14:59:33 +0200	[diff] [blame]	50	string "Board configuration name"
				51	default "zynq-common"
				52	help
				53	This option contains information about board configuration name.
				54	Based on this option include/configs/<CONFIG_SYS_CONFIG_NAME>.h header
				55	will be used for board configuration.
Masahiro Yamada	a3cd898	2014-08-31 07:10:55 +0900	[diff] [blame]	56
Simon Glass	cb3e489	2016-07-05 17:10:13 -0600	[diff] [blame]	57	config SYS_MALLOC_F_LEN
Anton Gerasimov	d6f88e3	2018-12-24 02:29:04 +0100	[diff] [blame]	58	default 0x800
Simon Glass	cb3e489	2016-07-05 17:10:13 -0600	[diff] [blame]	59
Siva Durga Prasad Paladugu	9adb526	2018-07-20 15:11:38 +0530	[diff] [blame]	60	config SYS_MALLOC_LEN
				61	default 0x1400000
				62
Mike Looijmans	96e706f	2016-09-20 11:37:24 +0200	[diff] [blame]	63	config BOOT_INIT_FILE
				64	string "boot.bin init register filename"
				65	default ""
				66	help
				67	Add register writes to boot.bin format (max 256 pairs).
				68	Expect a table of register-value pairs, e.g. "0x12345678 0x4321"
				69
Vipul Kumar	6254800	2018-02-28 15:53:28 +0530	[diff] [blame]	70	config ZYNQ_SDHCI_MAX_FREQ
				71	default 52000000
				72
Michal Simek	5f88485	2020-08-27 15:34:11 +0200	[diff] [blame]	73	source "board/xilinx/Kconfig"
				74	source "board/xilinx/zynq/Kconfig"
				75
Masahiro Yamada	a3cd898	2014-08-31 07:10:55 +0900	[diff] [blame]	76	endif