| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/spi/microchip,mpfs-spi.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Microchip FPGA {Q,}SPI Controllers |
| 8 | |
| 9 | description: |
| 10 | SPI and QSPI controllers on Microchip PolarFire SoC and the "soft"/ |
| 11 | fabric IP cores they are based on |
| 12 | |
| 13 | maintainers: |
| 14 | - Conor Dooley <conor.dooley@microchip.com> |
| 15 | |
| 16 | allOf: |
| 17 | - $ref: spi-controller.yaml# |
| 18 | |
| 19 | properties: |
| 20 | compatible: |
| 21 | oneOf: |
| 22 | - items: |
| 23 | - const: microchip,mpfs-qspi |
| 24 | - const: microchip,coreqspi-rtl-v2 |
| 25 | - const: microchip,coreqspi-rtl-v2 # FPGA QSPI |
| 26 | - const: microchip,mpfs-spi |
| 27 | |
| 28 | reg: |
| 29 | maxItems: 1 |
| 30 | |
| 31 | interrupts: |
| 32 | maxItems: 1 |
| 33 | |
| 34 | clock-names: |
| 35 | maxItems: 1 |
| 36 | |
| 37 | clocks: |
| 38 | maxItems: 1 |
| 39 | |
| 40 | required: |
| 41 | - compatible |
| 42 | - reg |
| 43 | - interrupts |
| 44 | - clocks |
| 45 | |
| 46 | unevaluatedProperties: false |
| 47 | |
| 48 | examples: |
| 49 | - | |
| 50 | #include "dt-bindings/clock/microchip,mpfs-clock.h" |
| 51 | spi@20108000 { |
| 52 | compatible = "microchip,mpfs-spi"; |
| 53 | reg = <0x20108000 0x1000>; |
| 54 | clocks = <&clkcfg CLK_SPI0>; |
| 55 | interrupt-parent = <&plic>; |
| 56 | interrupts = <54>; |
| 57 | }; |
| 58 | ... |