| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/soc/imx/fsl,imx-iomuxc-gpr.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Freescale IOMUX Controller General Purpose Registers |
| 8 | |
| 9 | maintainers: |
| 10 | - Peng Fan <peng.fan@nxp.com> |
| 11 | |
| 12 | description: |
| 13 | i.MX Processors have an IOMUXC General Purpose Register group for |
| 14 | various System Settings |
| 15 | |
| 16 | properties: |
| 17 | compatible: |
| 18 | oneOf: |
| 19 | - items: |
| Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 20 | - enum: |
| 21 | - fsl,imx6q-iomuxc-gpr |
| 22 | - fsl,imx8mq-iomuxc-gpr |
| 23 | - const: syscon |
| 24 | - const: simple-mfd |
| 25 | - items: |
| 26 | - enum: |
| 27 | - fsl,imx6sl-iomuxc-gpr |
| 28 | - fsl,imx6sll-iomuxc-gpr |
| 29 | - fsl,imx6ul-iomuxc-gpr |
| 30 | - const: fsl,imx6q-iomuxc-gpr |
| 31 | - const: syscon |
| 32 | - items: |
| 33 | - enum: |
| 34 | - fsl,imx6sx-iomuxc-gpr |
| 35 | - fsl,imx7d-iomuxc-gpr |
| 36 | - const: fsl,imx6q-iomuxc-gpr |
| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 37 | - const: syscon |
| 38 | - const: simple-mfd |
| 39 | - items: |
| 40 | - enum: |
| 41 | - fsl,imx8mm-iomuxc-gpr |
| 42 | - fsl,imx8mn-iomuxc-gpr |
| 43 | - fsl,imx8mp-iomuxc-gpr |
| 44 | - const: syscon |
| 45 | |
| 46 | reg: |
| 47 | maxItems: 1 |
| 48 | |
| 49 | mux-controller: |
| 50 | type: object |
| 51 | $ref: /schemas/mux/reg-mux.yaml |
| 52 | |
| 53 | additionalProperties: false |
| 54 | |
| 55 | required: |
| 56 | - compatible |
| 57 | - reg |
| 58 | |
| 59 | examples: |
| 60 | # Pinmux controller node |
| 61 | - | |
| 62 | iomuxc_gpr: syscon@30340000 { |
| 63 | compatible = "fsl,imx8mq-iomuxc-gpr", "syscon", "simple-mfd"; |
| 64 | reg = <0x30340000 0x10000>; |
| 65 | |
| 66 | mux: mux-controller { |
| 67 | compatible = "mmio-mux"; |
| 68 | #mux-control-cells = <1>; |
| 69 | mux-reg-masks = <0x34 0x00000004>; /* MIPI_MUX_SEL */ |
| 70 | }; |
| 71 | }; |
| 72 | |
| 73 | ... |