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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/qcom,ipq806x-usb-phy-hs.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm ipq806x usb DWC3 HS PHY CONTROLLER
8
9maintainers:
10 - Ansuel Smith <ansuelsmth@gmail.com>
11
12description:
13 DWC3 PHY nodes are defined to describe on-chip Synopsis Physical layer
14 controllers used in ipq806x. Each DWC3 PHY controller should have its
15 own node.
16
17properties:
18 compatible:
19 const: qcom,ipq806x-usb-phy-hs
20
21 "#phy-cells":
22 const: 0
23
24 reg:
25 maxItems: 1
26
27 clocks:
28 minItems: 1
29 maxItems: 2
30
31 clock-names:
32 minItems: 1
33 items:
34 - const: ref
35 - const: xo
36
37required:
38 - compatible
39 - "#phy-cells"
40 - reg
41 - clocks
42 - clock-names
43
44additionalProperties: false
45
46examples:
47 - |
48 #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
49
50 hs_phy_0: phy@110f8800 {
51 compatible = "qcom,ipq806x-usb-phy-hs";
52 reg = <0x110f8800 0x30>;
53 clocks = <&gcc USB30_0_UTMI_CLK>;
54 clock-names = "ref";
55 #phy-cells = <0>;
56 };