Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/phy/nvidia,tegra124-xusb-padctl.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: NVIDIA Tegra124 XUSB pad controller |
| 8 | |
| 9 | maintainers: |
| 10 | - Thierry Reding <thierry.reding@gmail.com> |
| 11 | - Jon Hunter <jonathanh@nvidia.com> |
| 12 | |
| 13 | description: | |
| 14 | The Tegra XUSB pad controller manages a set of I/O lanes (with differential |
| 15 | signals) which connect directly to pins/pads on the SoC package. Each lane |
| 16 | is controlled by a HW block referred to as a "pad" in the Tegra hardware |
| 17 | documentation. Each such "pad" may control either one or multiple lanes, |
| 18 | and thus contains any logic common to all its lanes. Each lane can be |
| 19 | separately configured and powered up. |
| 20 | |
| 21 | Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or |
| 22 | super-speed USB. Other lanes are for various types of low-speed, full-speed |
| 23 | or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller |
| 24 | contains a software-configurable mux that sits between the I/O controller |
| 25 | ports (e.g. PCIe) and the lanes. |
| 26 | |
| 27 | In addition to per-lane configuration, USB 3.0 ports may require additional |
| 28 | settings on a per-board basis. |
| 29 | |
| 30 | Pads will be represented as children of the top-level XUSB pad controller |
| 31 | device tree node. Each lane exposed by the pad will be represented by its |
| 32 | own subnode and can be referenced by users of the lane using the standard |
| 33 | PHY bindings, as described by the phy-bindings.txt file in this directory. |
| 34 | |
| 35 | The Tegra hardware documentation refers to the connection between the XUSB |
| 36 | pad controller and the XUSB controller as "ports". This is confusing since |
| 37 | "port" is typically used to denote the physical USB receptacle. The device |
| 38 | tree binding in this document uses the term "port" to refer to the logical |
| 39 | abstraction of the signals that are routed to a USB receptacle (i.e. a PHY |
| 40 | for the USB signal, the VBUS power supply, the USB 2.0 companion port for |
| 41 | USB 3.0 receptacles, ...). |
| 42 | |
| 43 | properties: |
| 44 | compatible: |
| 45 | oneOf: |
| 46 | - enum: |
| 47 | - nvidia,tegra124-xusb-padctl |
| 48 | |
| 49 | - items: |
| 50 | - const: nvidia,tegra132-xusb-padctl |
| 51 | - const: nvidia,tegra124-xusb-padctl |
| 52 | |
| 53 | reg: |
| 54 | maxItems: 1 |
| 55 | |
| 56 | interrupts: |
| 57 | items: |
| 58 | - description: XUSB pad controller interrupt |
| 59 | |
| 60 | resets: |
| 61 | items: |
| 62 | - description: pad controller reset |
| 63 | |
| 64 | reset-names: |
| 65 | items: |
| 66 | - const: padctl |
| 67 | |
| 68 | avdd-pll-utmip-supply: |
| 69 | description: UTMI PLL power supply. Must supply 1.8 V. |
| 70 | |
| 71 | avdd-pll-erefe-supply: |
| 72 | description: PLLE reference PLL power supply. Must supply 1.05 V. |
| 73 | |
| 74 | avdd-pex-pll-supply: |
| 75 | description: PCIe/USB3 PLL power supply. Must supply 1.05 V. |
| 76 | |
| 77 | hvdd-pex-pll-e-supply: |
| 78 | description: High-voltage PLLE power supply. Must supply 3.3 V. |
| 79 | |
| 80 | pads: |
| 81 | description: A required child node named "pads" contains a list of |
| 82 | subnodes, one for each of the pads exposed by the XUSB pad controller. |
| 83 | Each pad may need additional resources that can be referenced in its |
| 84 | pad node. |
| 85 | |
| 86 | The "status" property is used to enable or disable the use of a pad. |
| 87 | If set to "disabled", the pad will not be used on the given board. In |
| 88 | order to use the pad and any of its lanes, this property must be set |
| 89 | to "okay" or be absent. |
| 90 | type: object |
| 91 | additionalProperties: false |
| 92 | properties: |
| 93 | usb2: |
| 94 | type: object |
| 95 | additionalProperties: false |
| 96 | properties: |
| 97 | clocks: |
| 98 | items: |
| 99 | - description: USB2 tracking clock |
| 100 | |
| 101 | clock-names: |
| 102 | items: |
| 103 | - const: trk |
| 104 | |
| 105 | lanes: |
| 106 | type: object |
| 107 | additionalProperties: false |
| 108 | properties: |
| 109 | usb2-0: |
| 110 | type: object |
| 111 | additionalProperties: false |
| 112 | properties: |
| 113 | "#phy-cells": |
| 114 | const: 0 |
| 115 | |
| 116 | nvidia,function: |
| 117 | description: Function selection for this lane. |
| 118 | $ref: /schemas/types.yaml#/definitions/string |
| 119 | enum: [ snps, xusb, uart ] |
| 120 | |
| 121 | usb2-1: |
| 122 | type: object |
| 123 | additionalProperties: false |
| 124 | properties: |
| 125 | "#phy-cells": |
| 126 | const: 0 |
| 127 | |
| 128 | nvidia,function: |
| 129 | description: Function selection for this lane. |
| 130 | $ref: /schemas/types.yaml#/definitions/string |
| 131 | enum: [ snps, xusb, uart ] |
| 132 | |
| 133 | usb2-2: |
| 134 | type: object |
| 135 | additionalProperties: false |
| 136 | properties: |
| 137 | "#phy-cells": |
| 138 | const: 0 |
| 139 | |
| 140 | nvidia,function: |
| 141 | description: Function selection for this lane. |
| 142 | $ref: /schemas/types.yaml#/definitions/string |
| 143 | enum: [ snps, xusb, uart ] |
| 144 | |
| 145 | ulpi: |
| 146 | type: object |
| 147 | additionalProperties: false |
| 148 | properties: |
| 149 | lanes: |
| 150 | type: object |
| 151 | additionalProperties: false |
| 152 | properties: |
| 153 | ulpi-0: |
| 154 | type: object |
| 155 | additionalProperties: false |
| 156 | properties: |
| 157 | "#phy-cells": |
| 158 | const: 0 |
| 159 | |
| 160 | nvidia,function: |
| 161 | description: Function selection for this lane. |
| 162 | $ref: /schemas/types.yaml#/definitions/string |
| 163 | enum: [ snps, xusb ] |
| 164 | |
| 165 | hsic: |
| 166 | type: object |
| 167 | additionalProperties: false |
| 168 | properties: |
| 169 | clocks: |
| 170 | items: |
| 171 | - description: HSIC tracking clock |
| 172 | |
| 173 | clock-names: |
| 174 | items: |
| 175 | - const: trk |
| 176 | |
| 177 | lanes: |
| 178 | type: object |
| 179 | additionalProperties: false |
| 180 | properties: |
| 181 | hsic-0: |
| 182 | type: object |
| 183 | additionalProperties: false |
| 184 | properties: |
| 185 | "#phy-cells": |
| 186 | const: 0 |
| 187 | |
| 188 | nvidia,function: |
| 189 | description: Function selection for this lane. |
| 190 | $ref: /schemas/types.yaml#/definitions/string |
| 191 | enum: [ snps, xusb ] |
| 192 | |
| 193 | hsic-1: |
| 194 | type: object |
| 195 | additionalProperties: false |
| 196 | properties: |
| 197 | "#phy-cells": |
| 198 | const: 0 |
| 199 | |
| 200 | nvidia,function: |
| 201 | description: Function selection for this lane. |
| 202 | $ref: /schemas/types.yaml#/definitions/string |
| 203 | enum: [ snps, xusb ] |
| 204 | |
| 205 | pcie: |
| 206 | type: object |
| 207 | additionalProperties: false |
| 208 | properties: |
| 209 | clocks: |
| 210 | items: |
| 211 | - description: PLLE clock |
| 212 | |
| 213 | clock-names: |
| 214 | items: |
| 215 | - const: pll |
| 216 | |
| 217 | resets: |
| 218 | items: |
| 219 | - description: reset for the PCIe UPHY block |
| 220 | |
| 221 | reset-names: |
| 222 | items: |
| 223 | - const: phy |
| 224 | |
| 225 | lanes: |
| 226 | type: object |
| 227 | additionalProperties: false |
| 228 | properties: |
| 229 | pcie-0: |
| 230 | type: object |
| 231 | additionalProperties: false |
| 232 | properties: |
| 233 | "#phy-cells": |
| 234 | const: 0 |
| 235 | |
| 236 | nvidia,function: |
| 237 | description: Function selection for this lane. |
| 238 | $ref: /schemas/types.yaml#/definitions/string |
| 239 | enum: [ pcie, usb3-ss ] |
| 240 | |
| 241 | pcie-1: |
| 242 | type: object |
| 243 | additionalProperties: false |
| 244 | properties: |
| 245 | "#phy-cells": |
| 246 | const: 0 |
| 247 | |
| 248 | nvidia,function: |
| 249 | description: Function selection for this lane. |
| 250 | $ref: /schemas/types.yaml#/definitions/string |
| 251 | enum: [ pcie, usb3-ss ] |
| 252 | |
| 253 | pcie-2: |
| 254 | type: object |
| 255 | additionalProperties: false |
| 256 | properties: |
| 257 | "#phy-cells": |
| 258 | const: 0 |
| 259 | |
| 260 | nvidia,function: |
| 261 | description: Function selection for this lane. |
| 262 | $ref: /schemas/types.yaml#/definitions/string |
| 263 | enum: [ pcie, usb3-ss ] |
| 264 | |
| 265 | pcie-3: |
| 266 | type: object |
| 267 | additionalProperties: false |
| 268 | properties: |
| 269 | "#phy-cells": |
| 270 | const: 0 |
| 271 | |
| 272 | nvidia,function: |
| 273 | description: Function selection for this lane. |
| 274 | $ref: /schemas/types.yaml#/definitions/string |
| 275 | enum: [ pcie, usb3-ss ] |
| 276 | |
| 277 | pcie-4: |
| 278 | type: object |
| 279 | additionalProperties: false |
| 280 | properties: |
| 281 | "#phy-cells": |
| 282 | const: 0 |
| 283 | |
| 284 | nvidia,function: |
| 285 | description: Function selection for this lane. |
| 286 | $ref: /schemas/types.yaml#/definitions/string |
| 287 | enum: [ pcie, usb3-ss ] |
| 288 | |
| 289 | sata: |
| 290 | type: object |
| 291 | additionalProperties: false |
| 292 | properties: |
| 293 | resets: |
| 294 | items: |
| 295 | - description: reset for the SATA UPHY block |
| 296 | |
| 297 | reset-names: |
| 298 | items: |
| 299 | - const: phy |
| 300 | |
| 301 | lanes: |
| 302 | type: object |
| 303 | additionalProperties: false |
| 304 | properties: |
| 305 | sata-0: |
| 306 | type: object |
| 307 | additionalProperties: false |
| 308 | properties: |
| 309 | "#phy-cells": |
| 310 | const: 0 |
| 311 | |
| 312 | nvidia,function: |
| 313 | description: Function selection for this lane. |
| 314 | $ref: /schemas/types.yaml#/definitions/string |
| 315 | enum: [ sata, usb3-ss ] |
| 316 | |
| 317 | ports: |
| 318 | description: A required child node named "ports" contains a list of |
| 319 | subnodes, one for each of the ports exposed by the XUSB pad controller. |
| 320 | Each port may need additional resources that can be referenced in its |
| 321 | port node. |
| 322 | |
| 323 | The "status" property is used to enable or disable the use of a port. |
| 324 | If set to "disabled", the port will not be used on the given board. In |
| 325 | order to use the port, this property must be set to "okay". |
| 326 | type: object |
| 327 | additionalProperties: false |
| 328 | properties: |
| 329 | usb2-0: |
| 330 | type: object |
| 331 | additionalProperties: false |
| 332 | properties: |
| 333 | # no need to further describe this because the connector will |
| 334 | # match on gpio-usb-b-connector or usb-b-connector and cause |
| 335 | # that binding to be selected for the subnode |
| 336 | connector: |
| 337 | type: object |
| 338 | |
| 339 | mode: |
| 340 | description: A string that determines the mode in which to |
| 341 | run the port. |
| 342 | $ref: /schemas/types.yaml#/definitions/string |
| 343 | enum: [ host, peripheral, otg ] |
| 344 | |
| 345 | nvidia,internal: |
| 346 | description: A boolean property whose presence determines |
| 347 | that a port is internal. In the absence of this property |
| 348 | the port is considered to be external. |
| 349 | $ref: /schemas/types.yaml#/definitions/flag |
| 350 | |
| 351 | usb-role-switch: |
| 352 | description: | |
| 353 | A boolean property whole presence indicates that the port |
| 354 | supports OTG or peripheral mode. If present, the port |
| 355 | supports switching between USB host and peripheral roles. |
| 356 | A connector must be added as a subnode in that case. |
| 357 | |
| 358 | See ../connector/usb-connector.yaml. |
| 359 | |
| 360 | vbus-supply: |
| 361 | description: A phandle to the regulator supplying the VBUS |
| 362 | voltage. |
| 363 | |
| 364 | usb2-1: |
| 365 | type: object |
| 366 | additionalProperties: false |
| 367 | properties: |
| 368 | # no need to further describe this because the connector will |
| 369 | # match on gpio-usb-b-connector or usb-b-connector and cause |
| 370 | # that binding to be selected for the subnode |
| 371 | connector: |
| 372 | type: object |
| 373 | |
| 374 | mode: |
| 375 | description: A string that determines the mode in which to |
| 376 | run the port. |
| 377 | $ref: /schemas/types.yaml#/definitions/string |
| 378 | enum: [ host, peripheral, otg ] |
| 379 | |
| 380 | nvidia,internal: |
| 381 | description: A boolean property whose presence determines |
| 382 | that a port is internal. In the absence of this property |
| 383 | the port is considered to be external. |
| 384 | $ref: /schemas/types.yaml#/definitions/flag |
| 385 | |
| 386 | usb-role-switch: |
| 387 | description: | |
| 388 | A boolean property whole presence indicates that the port |
| 389 | supports OTG or peripheral mode. If present, the port |
| 390 | supports switching between USB host and peripheral roles. |
| 391 | A connector must be added as a subnode in that case. |
| 392 | |
| 393 | See ../connector/usb-connector.yaml. |
| 394 | |
| 395 | vbus-supply: |
| 396 | description: A phandle to the regulator supplying the VBUS |
| 397 | voltage. |
| 398 | |
| 399 | usb2-2: |
| 400 | type: object |
| 401 | additionalProperties: false |
| 402 | properties: |
| 403 | # no need to further describe this because the connector will |
| 404 | # match on gpio-usb-b-connector or usb-b-connector and cause |
| 405 | # that binding to be selected for the subnode |
| 406 | connector: |
| 407 | type: object |
| 408 | |
| 409 | mode: |
| 410 | description: A string that determines the mode in which to |
| 411 | run the port. |
| 412 | $ref: /schemas/types.yaml#/definitions/string |
| 413 | enum: [ host, peripheral, otg ] |
| 414 | |
| 415 | nvidia,internal: |
| 416 | description: A boolean property whose presence determines |
| 417 | that a port is internal. In the absence of this property |
| 418 | the port is considered to be external. |
| 419 | $ref: /schemas/types.yaml#/definitions/flag |
| 420 | |
| 421 | usb-role-switch: |
| 422 | description: | |
| 423 | A boolean property whole presence indicates that the port |
| 424 | supports OTG or peripheral mode. If present, the port |
| 425 | supports switching between USB host and peripheral roles. |
| 426 | A connector must be added as a subnode in that case. |
| 427 | |
| 428 | See ../connector/usb-connector.yaml. |
| 429 | |
| 430 | vbus-supply: |
| 431 | description: A phandle to the regulator supplying the VBUS |
| 432 | voltage. |
| 433 | |
| 434 | ulpi-0: |
| 435 | type: object |
| 436 | additionalProperties: false |
| 437 | properties: |
| 438 | nvidia,internal: |
| 439 | description: A boolean property whose presence determines |
| 440 | that a port is internal. In the absence of this property |
| 441 | the port is considered to be external. |
| 442 | $ref: /schemas/types.yaml#/definitions/flag |
| 443 | |
| 444 | vbus-supply: |
| 445 | description: A phandle to the regulator supplying the VBUS |
| 446 | voltage. |
| 447 | |
| 448 | hsic-0: |
| 449 | type: object |
| 450 | additionalProperties: false |
| 451 | properties: |
| 452 | vbus-supply: |
| 453 | description: A phandle to the regulator supplying the VBUS |
| 454 | voltage. |
| 455 | |
| 456 | hsic-1: |
| 457 | type: object |
| 458 | additionalProperties: false |
| 459 | properties: |
| 460 | vbus-supply: |
| 461 | description: A phandle to the regulator supplying the VBUS |
| 462 | voltage. |
| 463 | |
| 464 | usb3-0: |
| 465 | type: object |
| 466 | additionalProperties: false |
| 467 | properties: |
| 468 | nvidia,internal: |
| 469 | description: A boolean property whose presence determines |
| 470 | that a port is internal. In the absence of this property |
| 471 | the port is considered to be external. |
| 472 | $ref: /schemas/types.yaml#/definitions/flag |
| 473 | |
| 474 | nvidia,usb2-companion: |
| 475 | description: A single cell that specifies the physical port |
| 476 | number to map this super-speed USB port to. The range of |
| 477 | valid port numbers varies with the SoC generation. |
| 478 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 479 | enum: [ 0, 1, 2 ] |
| 480 | |
| 481 | vbus-supply: |
| 482 | description: A phandle to the regulator supplying the VBUS |
| 483 | voltage. |
| 484 | |
| 485 | usb3-1: |
| 486 | type: object |
| 487 | additionalProperties: false |
| 488 | properties: |
| 489 | nvidia,internal: |
| 490 | description: A boolean property whose presence determines |
| 491 | that a port is internal. In the absence of this property |
| 492 | the port is considered to be external. |
| 493 | $ref: /schemas/types.yaml#/definitions/flag |
| 494 | |
| 495 | nvidia,usb2-companion: |
| 496 | description: A single cell that specifies the physical port |
| 497 | number to map this super-speed USB port to. The range of |
| 498 | valid port numbers varies with the SoC generation. |
| 499 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 500 | enum: [ 0, 1, 2 ] |
| 501 | |
| 502 | vbus-supply: |
| 503 | description: A phandle to the regulator supplying the VBUS |
| 504 | voltage. |
| 505 | |
| 506 | additionalProperties: false |
| 507 | |
| 508 | required: |
| 509 | - compatible |
| 510 | - reg |
| 511 | - resets |
| 512 | - reset-names |
| 513 | - avdd-pll-utmip-supply |
| 514 | - avdd-pll-erefe-supply |
| 515 | - avdd-pex-pll-supply |
| 516 | - hvdd-pex-pll-e-supply |
| 517 | |
| 518 | examples: |
| 519 | # Tegra124 and Tegra132 |
| 520 | - | |
| 521 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 522 | |
| 523 | padctl@7009f000 { |
| 524 | compatible = "nvidia,tegra124-xusb-padctl"; |
| 525 | reg = <0x7009f000 0x1000>; |
| 526 | interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; |
| 527 | resets = <&tegra_car 142>; |
| 528 | reset-names = "padctl"; |
| 529 | |
| 530 | avdd-pll-utmip-supply = <&vddio_1v8>; |
| 531 | avdd-pll-erefe-supply = <&avdd_1v05_run>; |
| 532 | avdd-pex-pll-supply = <&vdd_1v05_run>; |
| 533 | hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>; |
| 534 | |
| 535 | pads { |
| 536 | usb2 { |
| 537 | lanes { |
| 538 | usb2-0 { |
| 539 | nvidia,function = "xusb"; |
| 540 | #phy-cells = <0>; |
| 541 | }; |
| 542 | |
| 543 | usb2-1 { |
| 544 | nvidia,function = "xusb"; |
| 545 | #phy-cells = <0>; |
| 546 | }; |
| 547 | |
| 548 | usb2-2 { |
| 549 | nvidia,function = "xusb"; |
| 550 | #phy-cells = <0>; |
| 551 | }; |
| 552 | }; |
| 553 | }; |
| 554 | |
| 555 | ulpi { |
| 556 | lanes { |
| 557 | ulpi-0 { |
| 558 | status = "disabled"; |
| 559 | #phy-cells = <0>; |
| 560 | }; |
| 561 | }; |
| 562 | }; |
| 563 | |
| 564 | hsic { |
| 565 | lanes { |
| 566 | hsic-0 { |
| 567 | status = "disabled"; |
| 568 | #phy-cells = <0>; |
| 569 | }; |
| 570 | |
| 571 | hsic-1 { |
| 572 | status = "disabled"; |
| 573 | #phy-cells = <0>; |
| 574 | }; |
| 575 | }; |
| 576 | }; |
| 577 | |
| 578 | pcie { |
| 579 | lanes { |
| 580 | pcie-0 { |
| 581 | nvidia,function = "usb3-ss"; |
| 582 | #phy-cells = <0>; |
| 583 | }; |
| 584 | |
| 585 | pcie-1 { |
| 586 | status = "disabled"; |
| 587 | #phy-cells = <0>; |
| 588 | }; |
| 589 | |
| 590 | pcie-2 { |
| 591 | nvidia,function = "pcie"; |
| 592 | #phy-cells = <0>; |
| 593 | }; |
| 594 | |
| 595 | pcie-3 { |
| 596 | status = "disabled"; |
| 597 | #phy-cells = <0>; |
| 598 | }; |
| 599 | |
| 600 | pcie-4 { |
| 601 | nvidia,function = "pcie"; |
| 602 | #phy-cells = <0>; |
| 603 | }; |
| 604 | }; |
| 605 | }; |
| 606 | |
| 607 | sata { |
| 608 | lanes { |
| 609 | sata-0 { |
| 610 | nvidia,function = "sata"; |
| 611 | #phy-cells = <0>; |
| 612 | }; |
| 613 | }; |
| 614 | }; |
| 615 | }; |
| 616 | |
| 617 | ports { |
| 618 | /* Micro A/B */ |
| 619 | usb2-0 { |
| 620 | mode = "otg"; |
| 621 | }; |
| 622 | |
| 623 | /* Mini PCIe */ |
| 624 | usb2-1 { |
| 625 | mode = "host"; |
| 626 | }; |
| 627 | |
| 628 | /* USB3 */ |
| 629 | usb2-2 { |
| 630 | vbus-supply = <&vdd_usb3_vbus>; |
| 631 | mode = "host"; |
| 632 | }; |
| 633 | |
| 634 | ulpi-0 { |
| 635 | status = "disabled"; |
| 636 | }; |
| 637 | |
| 638 | hsic-0 { |
| 639 | status = "disabled"; |
| 640 | }; |
| 641 | |
| 642 | hsic-1 { |
| 643 | status = "disabled"; |
| 644 | }; |
| 645 | |
| 646 | usb3-0 { |
| 647 | nvidia,usb2-companion = <2>; |
| 648 | }; |
| 649 | |
| 650 | usb3-1 { |
| 651 | status = "disabled"; |
| 652 | }; |
| 653 | }; |
| 654 | }; |