dts/upstream/Bindings/phy/intel,lgm-emmc-phy.yaml

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/intel,lgm-emmc-phy.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Intel Lightning Mountain(LGM) eMMC PHY

maintainers:
  - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>

description: |+
  Bindings for eMMC PHY on Intel's Lightning Mountain SoC, syscon
  node is used to reference the base address of eMMC phy registers.

  The eMMC PHY node should be the child of a syscon node with the
  required property:

  - compatible:         Should be one of the following:
                        "intel,lgm-syscon", "syscon"
  - reg:
      maxItems: 1

properties:
  compatible:
    enum:
      - intel,lgm-emmc-phy
      - intel,keembay-emmc-phy

  "#phy-cells":
    const: 0

  reg:
    maxItems: 1

  clocks:
    maxItems: 1

  clock-names:
    items:
      - const: emmcclk

required:
  - "#phy-cells"
  - compatible
  - reg
  - clocks

additionalProperties: false

examples:
  - |
    sysconf: chiptop@e0200000 {
      compatible = "intel,lgm-syscon", "syscon";
      reg = <0xe0200000 0x100>;
      #address-cells = <1>;
      #size-cells = <1>;

      emmc_phy: emmc-phy@a8 {
        compatible = "intel,lgm-emmc-phy";
        reg = <0x00a8 0x10>;
        clocks = <&emmc>;
        #phy-cells = <0>;
      };
    };

  - |
    phy@20290000 {
          compatible = "intel,keembay-emmc-phy";
          reg = <0x20290000 0x54>;
          clocks = <&emmc>;
          clock-names = "emmcclk";
          #phy-cells = <0>;
    };
...