| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/pci/sifive,fu740-pcie.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: SiFive FU740 PCIe host controller |
| 8 | |
| 9 | description: |+ |
| 10 | SiFive FU740 PCIe host controller is based on the Synopsys DesignWare |
| 11 | PCI core. It shares common features with the PCIe DesignWare core and |
| 12 | inherits common properties defined in |
| 13 | Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml. |
| 14 | |
| 15 | maintainers: |
| 16 | - Paul Walmsley <paul.walmsley@sifive.com> |
| 17 | - Greentime Hu <greentime.hu@sifive.com> |
| 18 | |
| 19 | allOf: |
| 20 | - $ref: /schemas/pci/snps,dw-pcie.yaml# |
| 21 | |
| 22 | properties: |
| 23 | compatible: |
| 24 | const: sifive,fu740-pcie |
| 25 | |
| 26 | reg: |
| 27 | maxItems: 3 |
| 28 | |
| 29 | reg-names: |
| 30 | items: |
| 31 | - const: dbi |
| 32 | - const: config |
| 33 | - const: mgmt |
| 34 | |
| 35 | dma-coherent: true |
| 36 | |
| 37 | num-lanes: |
| 38 | const: 8 |
| 39 | |
| 40 | msi-parent: true |
| 41 | |
| 42 | interrupt-names: |
| 43 | items: |
| 44 | - const: msi |
| 45 | - const: inta |
| 46 | - const: intb |
| 47 | - const: intc |
| 48 | - const: intd |
| 49 | |
| 50 | resets: |
| 51 | description: A phandle to the PCIe power up reset line. |
| 52 | maxItems: 1 |
| 53 | |
| 54 | clocks: |
| 55 | maxItems: 1 |
| 56 | |
| 57 | clock-names: |
| 58 | const: pcie_aux |
| 59 | |
| 60 | pwren-gpios: |
| 61 | description: Should specify the GPIO for controlling the PCI bus device power on. |
| 62 | maxItems: 1 |
| 63 | |
| 64 | reset-gpios: |
| 65 | maxItems: 1 |
| 66 | |
| 67 | required: |
| 68 | - dma-coherent |
| 69 | - num-lanes |
| 70 | - interrupts |
| 71 | - interrupt-names |
| 72 | - interrupt-map-mask |
| 73 | - interrupt-map |
| 74 | - clocks |
| 75 | - clock-names |
| 76 | - resets |
| 77 | - pwren-gpios |
| 78 | - reset-gpios |
| 79 | |
| 80 | unevaluatedProperties: false |
| 81 | |
| 82 | examples: |
| 83 | - | |
| 84 | bus { |
| 85 | #address-cells = <2>; |
| 86 | #size-cells = <2>; |
| 87 | #include <dt-bindings/clock/sifive-fu740-prci.h> |
| 88 | |
| 89 | pcie@e00000000 { |
| 90 | compatible = "sifive,fu740-pcie"; |
| 91 | #address-cells = <3>; |
| 92 | #size-cells = <2>; |
| 93 | #interrupt-cells = <1>; |
| 94 | reg = <0xe 0x00000000 0x0 0x80000000>, |
| 95 | <0xd 0xf0000000 0x0 0x10000000>, |
| 96 | <0x0 0x100d0000 0x0 0x1000>; |
| 97 | reg-names = "dbi", "config", "mgmt"; |
| 98 | device_type = "pci"; |
| 99 | dma-coherent; |
| 100 | bus-range = <0x0 0xff>; |
| 101 | ranges = <0x81000000 0x0 0x60080000 0x0 0x60080000 0x0 0x10000>, /* I/O */ |
| 102 | <0x82000000 0x0 0x60090000 0x0 0x60090000 0x0 0xff70000>, /* mem */ |
| 103 | <0x82000000 0x0 0x70000000 0x0 0x70000000 0x0 0x1000000>, /* mem */ |
| 104 | <0xc3000000 0x20 0x00000000 0x20 0x00000000 0x20 0x00000000>; /* mem prefetchable */ |
| 105 | num-lanes = <0x8>; |
| 106 | interrupts = <56>, <57>, <58>, <59>, <60>, <61>, <62>, <63>, <64>; |
| 107 | interrupt-names = "msi", "inta", "intb", "intc", "intd"; |
| 108 | interrupt-parent = <&plic0>; |
| 109 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; |
| 110 | interrupt-map = <0x0 0x0 0x0 0x1 &plic0 57>, |
| 111 | <0x0 0x0 0x0 0x2 &plic0 58>, |
| 112 | <0x0 0x0 0x0 0x3 &plic0 59>, |
| 113 | <0x0 0x0 0x0 0x4 &plic0 60>; |
| 114 | clock-names = "pcie_aux"; |
| 115 | clocks = <&prci FU740_PRCI_CLK_PCIE_AUX>; |
| 116 | resets = <&prci 4>; |
| 117 | pwren-gpios = <&gpio 5 0>; |
| 118 | reset-gpios = <&gpio 8 0>; |
| 119 | }; |
| 120 | }; |