Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/mtd/marvell,nand-controller.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Marvell NAND Flash Controller (NFC) |
| 8 | |
| 9 | maintainers: |
| 10 | - Miquel Raynal <miquel.raynal@bootlin.com> |
| 11 | |
| 12 | properties: |
| 13 | compatible: |
| 14 | oneOf: |
| 15 | - items: |
| 16 | - const: marvell,armada-8k-nand-controller |
| 17 | - const: marvell,armada370-nand-controller |
| 18 | - enum: |
| 19 | - marvell,ac5-nand-controller |
| 20 | - marvell,armada370-nand-controller |
| 21 | - marvell,pxa3xx-nand-controller |
| 22 | - description: legacy bindings |
| 23 | deprecated: true |
| 24 | enum: |
| 25 | - marvell,armada-8k-nand |
| 26 | - marvell,armada370-nand |
| 27 | - marvell,pxa3xx-nand |
| 28 | |
| 29 | reg: |
| 30 | maxItems: 1 |
| 31 | |
| 32 | interrupts: |
| 33 | maxItems: 1 |
| 34 | |
| 35 | clocks: |
| 36 | description: |
| 37 | Shall reference the NAND controller clocks, the second one is |
| 38 | is only needed for the Armada 7K/8K SoCs |
| 39 | minItems: 1 |
| 40 | maxItems: 2 |
| 41 | |
| 42 | clock-names: |
| 43 | minItems: 1 |
| 44 | items: |
| 45 | - const: core |
| 46 | - const: reg |
| 47 | |
| 48 | dmas: |
| 49 | maxItems: 1 |
| 50 | |
| 51 | dma-names: |
| 52 | items: |
| 53 | - const: data |
| 54 | |
| 55 | marvell,system-controller: |
| 56 | $ref: /schemas/types.yaml#/definitions/phandle |
| 57 | description: Syscon node that handles NAND controller related registers |
| 58 | |
| 59 | patternProperties: |
| 60 | "^nand@[a-f0-9]$": |
| 61 | type: object |
| 62 | $ref: raw-nand-chip.yaml |
| 63 | |
| 64 | properties: |
| 65 | reg: |
| 66 | minimum: 0 |
| 67 | maximum: 3 |
| 68 | |
| 69 | nand-rb: |
| 70 | items: |
| 71 | - minimum: 0 |
| 72 | maximum: 1 |
| 73 | |
| 74 | nand-ecc-step-size: |
| 75 | const: 512 |
| 76 | |
| 77 | nand-ecc-strength: |
| 78 | enum: [1, 4, 8, 12, 16] |
| 79 | |
| 80 | nand-ecc-mode: |
| 81 | const: hw |
| 82 | |
| 83 | marvell,nand-keep-config: |
| 84 | $ref: /schemas/types.yaml#/definitions/flag |
| 85 | description: |
| 86 | Orders the driver not to take the timings from the core and |
| 87 | leaving them completely untouched. Bootloader timings will then |
| 88 | be used. |
| 89 | |
| 90 | marvell,nand-enable-arbiter: |
| 91 | $ref: /schemas/types.yaml#/definitions/flag |
| 92 | description: |
| 93 | To enable the arbiter, all boards blindly used it, |
| 94 | this bit was set by the bootloader for many boards and even if |
| 95 | it is marked reserved in several datasheets, it might be needed to set |
| 96 | it (otherwise it is harmless). |
| 97 | deprecated: true |
| 98 | |
| 99 | required: |
| 100 | - reg |
| 101 | - nand-rb |
| 102 | |
| 103 | unevaluatedProperties: false |
| 104 | |
| 105 | required: |
| 106 | - compatible |
| 107 | - reg |
| 108 | - interrupts |
| 109 | - clocks |
| 110 | |
| 111 | allOf: |
| 112 | - $ref: nand-controller.yaml# |
| 113 | |
| 114 | - if: |
| 115 | properties: |
| 116 | compatible: |
| 117 | contains: |
| 118 | const: marvell,pxa3xx-nand-controller |
| 119 | then: |
| 120 | required: |
| 121 | - dmas |
| 122 | - dma-names |
| 123 | |
| 124 | - if: |
| 125 | properties: |
| 126 | compatible: |
| 127 | contains: |
| 128 | const: marvell,armada-8k-nand-controller |
| 129 | then: |
| 130 | properties: |
| 131 | clocks: |
| 132 | minItems: 2 |
| 133 | |
| 134 | clock-names: |
| 135 | minItems: 2 |
| 136 | |
| 137 | required: |
| 138 | - marvell,system-controller |
| 139 | |
| 140 | else: |
| 141 | properties: |
| 142 | clocks: |
| 143 | minItems: 1 |
| 144 | |
| 145 | clock-names: |
| 146 | minItems: 1 |
| 147 | |
| 148 | |
| 149 | unevaluatedProperties: false |
| 150 | |
| 151 | examples: |
| 152 | - | |
| 153 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 154 | nand_controller: nand-controller@d0000 { |
| 155 | compatible = "marvell,armada370-nand-controller"; |
| 156 | reg = <0xd0000 0x54>; |
| 157 | #address-cells = <1>; |
| 158 | #size-cells = <0>; |
| 159 | interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; |
| 160 | clocks = <&coredivclk 0>; |
| 161 | |
| 162 | nand@0 { |
| 163 | reg = <0>; |
| 164 | label = "main-storage"; |
| 165 | nand-rb = <0>; |
| 166 | nand-ecc-mode = "hw"; |
| 167 | marvell,nand-keep-config; |
| 168 | nand-on-flash-bbt; |
| 169 | nand-ecc-strength = <4>; |
| 170 | nand-ecc-step-size = <512>; |
| 171 | |
| 172 | partitions { |
| 173 | compatible = "fixed-partitions"; |
| 174 | #address-cells = <1>; |
| 175 | #size-cells = <1>; |
| 176 | |
| 177 | partition@0 { |
| 178 | label = "Rootfs"; |
| 179 | reg = <0x00000000 0x40000000>; |
| 180 | }; |
| 181 | }; |
| 182 | }; |
| 183 | }; |
| 184 | |
| 185 | - | |
| 186 | cp0_nand_controller: nand-controller@720000 { |
| 187 | compatible = "marvell,armada-8k-nand-controller", |
| 188 | "marvell,armada370-nand-controller"; |
| 189 | reg = <0x720000 0x54>; |
| 190 | #address-cells = <1>; |
| 191 | #size-cells = <0>; |
| 192 | interrupts = <115 IRQ_TYPE_LEVEL_HIGH>; |
| 193 | clock-names = "core", "reg"; |
| 194 | clocks = <&cp0_clk 1 2>, |
| 195 | <&cp0_clk 1 17>; |
| 196 | marvell,system-controller = <&cp0_syscon0>; |
| 197 | |
| 198 | nand@0 { |
| 199 | reg = <0>; |
| 200 | label = "main-storage"; |
| 201 | nand-rb = <0>; |
| 202 | nand-ecc-mode = "hw"; |
| 203 | nand-ecc-strength = <8>; |
| 204 | nand-ecc-step-size = <512>; |
| 205 | }; |
| 206 | }; |
| 207 | |
| 208 | - | |
| 209 | nand-controller@43100000 { |
| 210 | compatible = "marvell,pxa3xx-nand-controller"; |
| 211 | reg = <0x43100000 90>; |
| 212 | interrupts = <45>; |
| 213 | clocks = <&clks 1>; |
| 214 | clock-names = "core"; |
| 215 | dmas = <&pdma 97 3>; |
| 216 | dma-names = "data"; |
| 217 | #address-cells = <1>; |
| 218 | #size-cells = <0>; |
| 219 | nand@0 { |
| 220 | reg = <0>; |
| 221 | nand-rb = <0>; |
| 222 | nand-ecc-mode = "hw"; |
| 223 | marvell,nand-keep-config; |
| 224 | }; |
| 225 | }; |
| 226 | |
| 227 | ... |